diff mbox series

[RFC,v2,15/19] tune.py: add vector extensions to RISCV_IMPLIED

Message ID 20260930-riscv-tuning-rework-v2-15-9e29f3531d0e@baylibre.com
State Under Review
Headers show
Series riscv: add new ISA extensions and profile support | expand

Commit Message

Trevor Gamblin Sept. 30, 2026, 4:38 p.m. UTC 
AI-Generated: Uses Claude Opus 5.5

Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
---
 meta/lib/oe/tune.py | 11 +++++++++++
 1 file changed, 11 insertions(+)
diff mbox series

Patch

diff --git a/meta/lib/oe/tune.py b/meta/lib/oe/tune.py
index 1ff4b32e74..2ab3428da7 100644
--- a/meta/lib/oe/tune.py
+++ b/meta/lib/oe/tune.py
@@ -36,6 +36,17 @@  RISCV_IMPLIED = {
     'zcd': ['zca'],
     'zcmop': ['zca'],
     'zvbb': ['zvkb'],
+    # The vector subsets nest, for tunes with some of them but not v. Each
+    # entry lists everything it implies, since riscv_implied() only does one
+    # level of lookup.
+    'zve64d': ['zve32f', 'zve32x', 'zve64f', 'zve64x', 'zvl32b', 'zvl64b'],
+    'zve64f': ['zve32f', 'zve32x', 'zve64x', 'zvl32b', 'zvl64b'],
+    'zve64x': ['zve32x', 'zvl32b', 'zvl64b'],
+    'zve32f': ['zve32x', 'zvl32b'],
+    'zve32x': ['zvl32b'],
+    'zvfhmin': ['zve32f', 'zve32x', 'zvl32b'],
+    'zvl128b': ['zvl32b', 'zvl64b'],
+    'zvl64b': ['zvl32b'],
     # a reservation set of at most 64 bytes is also at most 128 bytes
     'za64rs': ['za128rs'],
 }