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[RFC,v2,01/19] tune-riscv: be explicit about riscv32gc, riscv64gc defaults

Message ID 20260930-riscv-tuning-rework-v2-1-9e29f3531d0e@baylibre.com
State Under Review
Headers show
Series riscv: add new ISA extensions and profile support | expand

Commit Message

Trevor Gamblin Sept. 30, 2026, 4:38 p.m. UTC 
The string 'riscv64' is a generic descriptor for the 64-bit RISC-V ISA,
and can mean different things under different contexts. In the case of
tune-riscv.inc, it has served as an alias for the 'riscv64gc' profile
which packages are typically built against, resulting in the following
output (from a typical bitbake preamble):

|TUNE_FEATURES        = "rv 64 i m a f d c zicsr zifencei"

Modify tune-riscv.inc to avoid overloading the 'riscv64' string in this
way, instead setting DEFAULTTUNE to 'riscv64gc', and changing other
occurrences to match. TUNE_FEATURES remains the same under this
adjustment, but the .inc file is clearer which profile is being
targeted.

Do the same for riscv32 -> riscv32gc. In this case, we also need to
update qemuriscv32.conf, since it sets DEFAULTTUNE to override the
default.

Also add TUNE_FEATURE aliases for the old riscv32 and riscv64 names so
that other layers using them don't break.

Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
---
 meta/conf/machine/include/riscv/tune-riscv.inc | 18 ++++++++++++------
 meta/conf/machine/qemuriscv32.conf             |  2 +-
 2 files changed, 13 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/meta/conf/machine/include/riscv/tune-riscv.inc b/meta/conf/machine/include/riscv/tune-riscv.inc
index 12c1125c8b..8a14971d5f 100644
--- a/meta/conf/machine/include/riscv/tune-riscv.inc
+++ b/meta/conf/machine/include/riscv/tune-riscv.inc
@@ -1,15 +1,21 @@ 
 require conf/machine/include/riscv/arch-riscv.inc
 
-DEFAULTTUNE ?= "riscv64"
+DEFAULTTUNE ?= "riscv64gc"
 
-AVAILTUNES += "riscv64 riscv32 riscv64nc riscv64nf riscv32nf"
+AVAILTUNES += "riscv64gc riscv32gc riscv64 riscv32 riscv64nc riscv64nf riscv32nf"
 
 # Default
-TUNE_FEATURES:tune-riscv64 := "${@oe.tune.riscv_isa_to_tune("rv64gc")}"
-PACKAGE_EXTRA_ARCHS:tune-riscv64 = "${TUNE_RISCV_PKGARCH}"
+TUNE_FEATURES:tune-riscv64gc := "${@oe.tune.riscv_isa_to_tune("rv64gc")}"
+PACKAGE_EXTRA_ARCHS:tune-riscv64gc = "${TUNE_RISCV_PKGARCH}"
 
-TUNE_FEATURES:tune-riscv32 := "${@oe.tune.riscv_isa_to_tune("rv32gc")}"
-PACKAGE_EXTRA_ARCHS:tune-riscv32 = "${TUNE_RISCV_PKGARCH}"
+TUNE_FEATURES:tune-riscv32gc := "${@oe.tune.riscv_isa_to_tune("rv32gc")}"
+PACKAGE_EXTRA_ARCHS:tune-riscv32gc = "${TUNE_RISCV_PKGARCH}"
+
+# Compatibility aliases so that layers using old tunes don't break
+TUNE_FEATURES:tune-riscv64 := "${TUNE_FEATURES:tune-riscv64gc}"
+PACKAGE_EXTRA_ARCHS:tune-riscv64 = "${PACKAGE_EXTRA_ARCHS:tune-riscv64gc}"
+TUNE_FEATURES:tune-riscv32 := "${TUNE_FEATURES:tune-riscv32gc}"
+PACKAGE_EXTRA_ARCHS:tune-riscv32 = "${PACKAGE_EXTRA_ARCHS:tune-riscv32gc}"
 
 # No float
 TUNE_FEATURES:tune-riscv64nf := "${@oe.tune.riscv_isa_to_tune("rv64imac_zicsr_zifencei")}"
diff --git a/meta/conf/machine/qemuriscv32.conf b/meta/conf/machine/qemuriscv32.conf
index aff36c28a5..5cb9ba5aa9 100644
--- a/meta/conf/machine/qemuriscv32.conf
+++ b/meta/conf/machine/qemuriscv32.conf
@@ -2,7 +2,7 @@ 
 #@NAME: generic riscv32 machine
 #@DESCRIPTION: Machine configuration for running a generic riscv32
 
-DEFAULTTUNE ?= "riscv32"
+DEFAULTTUNE ?= "riscv32gc"
 
 require conf/machine/include/riscv/qemuriscv.inc