new file mode 100644
@@ -0,0 +1,78 @@
+From 47c4146d2307757340d78117427853409404c080 Mon Sep 17 00:00:00 2001
+From: Trevor Woerner <twoerner@gmail.com>
+Date: Tue, 16 Jan 2024 14:07:49 -0500
+Subject: [PATCH] arm: dts: rk3328-rock-pi-e: enable networking
+
+Currently the rock-pi-e comes in 4 board spins, the latest of which
+replaces the realtek phy from the rtl8211e to the rtl8211f, therefore
+rename the phy handle to be more generic.
+
+The device tree includes information for the MDIO, therefore enable DM_MDIO
+to use it.
+
+A couple of the snps (Synopsys) properties were in the wrong location
+therefore move them to where they belong.
+
+Upstream-Status: Submitted
+Signed-off-by: Trevor Woerner <twoerner@gmail.com>
+---
+ arch/arm/dts/rk3328-rock-pi-e.dts | 14 +++++++-------
+ configs/rock-pi-e-rk3328_defconfig | 2 ++
+ 2 files changed, 9 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts
+index 018a3a5075c7..0739b8fec86e 100644
+--- a/arch/arm/dts/rk3328-rock-pi-e.dts
++++ b/arch/arm/dts/rk3328-rock-pi-e.dts
+@@ -146,12 +146,15 @@
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+ clock_in_out = "input";
+- phy-handle = <&rtl8211e>;
++ phy-handle = <&rtl8211>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_io>;
+ pinctrl-names = "default";
+- pinctrl-0 = <&rgmiim1_pins>;
++ pinctrl-0 = <&rgmiim1_pins>, <ð_phy_reset_pin>;
+ snps,aal;
++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
++ snps,reset-active-low;
++ snps,reset-delays-us = <0 10000 50000>;
+ snps,rxpbl = <0x4>;
+ snps,txpbl = <0x4>;
+ tx_delay = <0x26>;
+@@ -163,15 +166,12 @@
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+- rtl8211e: ethernet-phy@1 {
++ rtl8211: ethernet-phy@1 {
+ reg = <1>;
+- pinctrl-0 = <ð_phy_int_pin>, <ð_phy_reset_pin>;
++ pinctrl-0 = <ð_phy_int_pin>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+- reset-assert-us = <10000>;
+- reset-deassert-us = <50000>;
+- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+ };
+diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig
+index c0375beffec3..65ca028c0787 100644
+--- a/configs/rock-pi-e-rk3328_defconfig
++++ b/configs/rock-pi-e-rk3328_defconfig
+@@ -76,6 +76,8 @@ CONFIG_SYS_I2C_ROCKCHIP=y
+ CONFIG_MISC=y
+ CONFIG_MMC_DW=y
+ CONFIG_MMC_DW_ROCKCHIP=y
++CONFIG_PHY_REALTEK=y
++CONFIG_DM_MDIO=y
+ CONFIG_ETH_DESIGNWARE=y
+ CONFIG_GMAC_ROCKCHIP=y
+ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+--
+2.43.0.76.g1a87c842ece3
+
@@ -1,3 +1,8 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+SRC_URI:append:rock-pi-e = " \
+ file://0001-arm-dts-rk3328-rock-pi-e-enable-networking.patch \
+ "
+
# various machines require the pyelftools library for parsing dtb files
DEPENDS:append = " python3-pyelftools-native"
DEPENDS:append:rock-pi-s = " u-boot-tools-native"
The rock-pi-e currently comes in 4 board revisions, the latest of which (v1.21) replaces the realtek 8211e PHY with the 8211f. This patch enables networking on the rock-pi-e, which had not been working up to this point. Interestingly enough, this patch also has the side-effect of enabling both the 8211e and 8211f PHYs under Linux. Previously only the 8211e boards were working. Signed-off-by: Trevor Woerner <twoerner@gmail.com> --- changes in v3: - fix the device tree by moving the snps properties to their correct location - u-boot patch commit message tweaks changes in v2: - add eth_phy_reset_pin to pinctrl-0 in gmac2io node - u-boot patch commit message tweaks --- ...s-rk3328-rock-pi-e-enable-networking.patch | 78 +++++++++++++++++++ recipes-bsp/u-boot/u-boot%.bbappend | 5 ++ 2 files changed, 83 insertions(+) create mode 100644 recipes-bsp/u-boot/files/0001-arm-dts-rk3328-rock-pi-e-enable-networking.patch