Message ID | 2f67f7e4-f163-b9a8-3879-ed6ad25f3b4c@crashcourse.ca |
---|---|
State | New |
Headers | show |
Series | [v2] local.conf.sample: drop MIPS, PPC entries; add 64-bit RISC-V | expand |
> -----Original Message----- > From: openembedded-core@lists.openembedded.org <openembedded-core@lists.openembedded.org> On Behalf Of Robert P. J. Day > Sent: den 27 juni 2025 18:26 > To: OE Core mailing list <openembedded-core@lists.openembedded.org> > Subject: [OE-core] [PATCH v2] local.conf.sample: drop MIPS, PPC entries; add 64-bit RISC-V > > > 1) Drop MIPS and PPC lines since we should refer to only those arches > tested by the autobuilder. > 2) Add entry for 64-bit RISC-V. > > Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> > > --- > > diff --git a/meta/conf/templates/default/local.conf.sample b/meta/conf/templates/default/local.conf.sample > index 3a9706c1d5..6032dbba67 100644 > --- a/meta/conf/templates/default/local.conf.sample > +++ b/meta/conf/templates/default/local.conf.sample > @@ -21,11 +21,9 @@ > # > #MACHINE ?= "qemuarm" > #MACHINE ?= "qemuarm64" > -#MACHINE ?= "qemumips" > -#MACHINE ?= "qemumips64" > -#MACHINE ?= "qemuppc" > #MACHINE ?= "qemux86" > #MACHINE ?= "qemux86-64" > +#MACHINE ?= "qemuriscv64" Nitpick: keep them sorted. > # > # This sets the default machine to be qemux86-64 if no other machine is selected: > MACHINE ??= "qemux86-64" //Peter
diff --git a/meta/conf/templates/default/local.conf.sample b/meta/conf/templates/default/local.conf.sample index 3a9706c1d5..6032dbba67 100644 --- a/meta/conf/templates/default/local.conf.sample +++ b/meta/conf/templates/default/local.conf.sample @@ -21,11 +21,9 @@ # #MACHINE ?= "qemuarm" #MACHINE ?= "qemuarm64" -#MACHINE ?= "qemumips" -#MACHINE ?= "qemumips64" -#MACHINE ?= "qemuppc" #MACHINE ?= "qemux86" #MACHINE ?= "qemux86-64" +#MACHINE ?= "qemuriscv64" # # This sets the default machine to be qemux86-64 if no other machine is selected: MACHINE ??= "qemux86-64"
1) Drop MIPS and PPC lines since we should refer to only those arches tested by the autobuilder. 2) Add entry for 64-bit RISC-V. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> ---