diff mbox series

opensbi: bump to 1.8

Message ID 20260106221016.3504565-1-thomas.perrot@bootlin.com
State Changes Requested
Headers show
Series opensbi: bump to 1.8 | expand

Commit Message

Thomas Perrot Jan. 6, 2026, 10:10 p.m. UTC 
From: Thomas Perrot <thomas.perrot@bootlin.com>

This release has:
- Safe and reverse list iteration
- Stack protector support
- Allocate heap housekeeping nodes dynamically
- IPI device ratings
- Andes QiLai SoC support
- SpacemiT K1 SoC support
- ESWIN Computing EIC7700 SoC support
- Moved Ariane and Openpiton to generic platform
- SiFive CLINT v2 support
- Simple FDT based cache library
- SiFive PL2 cache controller driver
- SiFive Extensible Cache (EC) driver
- SiFive TMC0 based HSM driver
- SiFive SMC0 based system suspend driver
- MPXY RPMI mailbox driver for voltage service group
- MPXY RPMI mailbox driver for device power service group
- MPXY RPMI mailbox driver for performance service group
- HART protection abstraction

Overall, this release has various domain related improvements and
also adds multiple platform support.

Also switch Qemu -cpu parameter to rv64 because rva23s64 and rva22s64
profiles lack PMP entries, causing hart isolation configuration to fail [1].

[1] https://lists.nongnu.org/archive/html/qemu-riscv/2026-01/msg00048.html

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
---
 meta/conf/machine/include/riscv/qemuriscv.inc               | 2 +-
 meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
 rename meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} (97%)

Comments

Ankur Tyagi Jan. 6, 2026, 10:30 p.m. UTC | #1 
On Wed, Jan 7, 2026 at 11:12 AM Thomas Perrot via
lists.openembedded.org
<thomas.perrot=bootlin.com@lists.openembedded.org> wrote:
>
> From: Thomas Perrot <thomas.perrot@bootlin.com>
>
> This release has:
> - Safe and reverse list iteration
> - Stack protector support
> - Allocate heap housekeeping nodes dynamically
> - IPI device ratings
> - Andes QiLai SoC support
> - SpacemiT K1 SoC support
> - ESWIN Computing EIC7700 SoC support
> - Moved Ariane and Openpiton to generic platform
> - SiFive CLINT v2 support
> - Simple FDT based cache library
> - SiFive PL2 cache controller driver
> - SiFive Extensible Cache (EC) driver
> - SiFive TMC0 based HSM driver
> - SiFive SMC0 based system suspend driver
> - MPXY RPMI mailbox driver for voltage service group
> - MPXY RPMI mailbox driver for device power service group
> - MPXY RPMI mailbox driver for performance service group
> - HART protection abstraction
>
> Overall, this release has various domain related improvements and
> also adds multiple platform support.
>
> Also switch Qemu -cpu parameter to rv64 because rva23s64 and rva22s64
> profiles lack PMP entries, causing hart isolation configuration to fail [1].
>
> [1] https://lists.nongnu.org/archive/html/qemu-riscv/2026-01/msg00048.html
>
> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
> ---
>  meta/conf/machine/include/riscv/qemuriscv.inc               | 2 +-
>  meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>  rename meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} (97%)
>
> diff --git a/meta/conf/machine/include/riscv/qemuriscv.inc b/meta/conf/machine/include/riscv/qemuriscv.inc
> index b755d32c9d1a..45fcf36e62d9 100644
> --- a/meta/conf/machine/include/riscv/qemuriscv.inc
> +++ b/meta/conf/machine/include/riscv/qemuriscv.inc
> @@ -27,7 +27,7 @@ UBOOT_ENTRYPOINT:riscv64 = "0x80200000"
>  # qemuboot options
>  QB_SMP ?= "-smp 4"
>  QB_KERNEL_CMDLINE_APPEND = "earlycon=sbi"
> -QB_CPU:riscv64 ?= "-cpu rva23s64"
> +QB_CPU:riscv64 ?= "-cpu rv64"
>  QB_MACHINE = "-machine virt"
>  QB_DEFAULT_BIOS = "fw_jump.elf"
>  QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no"
> diff --git a/meta/recipes-bsp/opensbi/opensbi_1.7.bb b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> similarity index 97%
> rename from meta/recipes-bsp/opensbi/opensbi_1.7.bb
> rename to meta/recipes-bsp/opensbi/opensbi_1.8.bb
> index a460062e9398..f2d3e9f20082 100644
> --- a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
> +++ b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> @@ -8,7 +8,7 @@ require opensbi-payloads.inc
>
>  inherit deploy
>
> -SRCREV = "a32a91069119e7a5aa31e6bc51d5e00860be3d80"
> +SRCREV = "e7fa66c2160ec139de1853a00f669c09320a9256"
>  SRC_URI = "git://github.com/riscv/opensbi.git;branch=master;protocol=https"

Can you please also try including tag=v${PV} in the SRC_URI ?

>  TARGET_DBGSRC_DIR = "/share/opensbi/*/generic/firmware/"
> --
> 2.52.0
>
>
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Khem Raj Jan. 7, 2026, 3:29 a.m. UTC | #2 
On Tue, Jan 6, 2026 at 2:30 PM Ankur Tyagi via lists.openembedded.org
<ankur.tyagi85=gmail.com@lists.openembedded.org> wrote:

> On Wed, Jan 7, 2026 at 11:12 AM Thomas Perrot via
> lists.openembedded.org
> <thomas.perrot=bootlin.com@lists.openembedded.org> wrote:
> >
> > From: Thomas Perrot <thomas.perrot@bootlin.com>
> >
> > This release has:
> > - Safe and reverse list iteration
> > - Stack protector support
> > - Allocate heap housekeeping nodes dynamically
> > - IPI device ratings
> > - Andes QiLai SoC support
> > - SpacemiT K1 SoC support
> > - ESWIN Computing EIC7700 SoC support
> > - Moved Ariane and Openpiton to generic platform
> > - SiFive CLINT v2 support
> > - Simple FDT based cache library
> > - SiFive PL2 cache controller driver
> > - SiFive Extensible Cache (EC) driver
> > - SiFive TMC0 based HSM driver
> > - SiFive SMC0 based system suspend driver
> > - MPXY RPMI mailbox driver for voltage service group
> > - MPXY RPMI mailbox driver for device power service group
> > - MPXY RPMI mailbox driver for performance service group
> > - HART protection abstraction
> >
> > Overall, this release has various domain related improvements and
> > also adds multiple platform support.
> >
> > Also switch Qemu -cpu parameter to rv64 because rva23s64 and rva22s64
> > profiles lack PMP entries, causing hart isolation configuration to fail
> [1].
> >
> > [1]
> https://lists.nongnu.org/archive/html/qemu-riscv/2026-01/msg00048.html
> >


Is this change temporary ? This change to rva23 is intentional and we want
to continue to use it so we can use rvv 1.0 switching back in a less than
ideal
Can you explore more



> > Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
> > ---
> >  meta/conf/machine/include/riscv/qemuriscv.inc               | 2 +-
> >  meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} | 2 +-
> >  2 files changed, 2 insertions(+), 2 deletions(-)
> >  rename meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb}
> (97%)
> >
> > diff --git a/meta/conf/machine/include/riscv/qemuriscv.inc
> b/meta/conf/machine/include/riscv/qemuriscv.inc
> > index b755d32c9d1a..45fcf36e62d9 100644
> > --- a/meta/conf/machine/include/riscv/qemuriscv.inc
> > +++ b/meta/conf/machine/include/riscv/qemuriscv.inc
> > @@ -27,7 +27,7 @@ UBOOT_ENTRYPOINT:riscv64 = "0x80200000"
> >  # qemuboot options
> >  QB_SMP ?= "-smp 4"
> >  QB_KERNEL_CMDLINE_APPEND = "earlycon=sbi"
> > -QB_CPU:riscv64 ?= "-cpu rva23s64"
> > +QB_CPU:riscv64 ?= "-cpu rv64"
> >  QB_MACHINE = "-machine virt"
> >  QB_DEFAULT_BIOS = "fw_jump.elf"
> >  QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no"
> > diff --git a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
> b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > similarity index 97%
> > rename from meta/recipes-bsp/opensbi/opensbi_1.7.bb
> > rename to meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > index a460062e9398..f2d3e9f20082 100644
> > --- a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
> > +++ b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > @@ -8,7 +8,7 @@ require opensbi-payloads.inc
> >
> >  inherit deploy
> >
> > -SRCREV = "a32a91069119e7a5aa31e6bc51d5e00860be3d80"
> > +SRCREV = "e7fa66c2160ec139de1853a00f669c09320a9256"
> >  SRC_URI = "git://
> github.com/riscv/opensbi.git;branch=master;protocol=https"
>
> Can you please also try including tag=v${PV} in the SRC_URI ?
>
> >  TARGET_DBGSRC_DIR = "/share/opensbi/*/generic/firmware/"
> > --
> > 2.52.0
> >
> >
> >
> >
>
> -=-=-=-=-=-=-=-=-=-=-=-
> Links: You receive all messages sent to this group.
> View/Reply Online (#228936):
> https://lists.openembedded.org/g/openembedded-core/message/228936
> Mute This Topic: https://lists.openembedded.org/mt/117115594/1997914
> Group Owner: openembedded-core+owner@lists.openembedded.org
> Unsubscribe: https://lists.openembedded.org/g/openembedded-core/unsub [
> raj.khem@gmail.com]
> -=-=-=-=-=-=-=-=-=-=-=-
>
>
Thomas Perrot Jan. 7, 2026, 9:11 a.m. UTC | #3 
Hello,

On Tue, 2026-01-06 at 19:29 -0800, Khem Raj via lists.openembedded.org
wrote:
> 
> 
> On Tue, Jan 6, 2026 at 2:30 PM Ankur Tyagi via lists.openembedded.org
> <ankur.tyagi85=gmail.com@lists.openembedded.org> wrote:
> > On Wed, Jan 7, 2026 at 11:12 AM Thomas Perrot via
> > lists.openembedded.org
> > <thomas.perrot=bootlin.com@lists.openembedded.org> wrote:
> > > 
> > > From: Thomas Perrot <thomas.perrot@bootlin.com>
> > > 
> > > This release has:
> > > - Safe and reverse list iteration
> > > - Stack protector support
> > > - Allocate heap housekeeping nodes dynamically
> > > - IPI device ratings
> > > - Andes QiLai SoC support
> > > - SpacemiT K1 SoC support
> > > - ESWIN Computing EIC7700 SoC support
> > > - Moved Ariane and Openpiton to generic platform
> > > - SiFive CLINT v2 support
> > > - Simple FDT based cache library
> > > - SiFive PL2 cache controller driver
> > > - SiFive Extensible Cache (EC) driver
> > > - SiFive TMC0 based HSM driver
> > > - SiFive SMC0 based system suspend driver
> > > - MPXY RPMI mailbox driver for voltage service group
> > > - MPXY RPMI mailbox driver for device power service group
> > > - MPXY RPMI mailbox driver for performance service group
> > > - HART protection abstraction
> > > 
> > > Overall, this release has various domain related improvements and
> > > also adds multiple platform support.
> > > 
> > > Also switch Qemu -cpu parameter to rv64 because rva23s64 and
> > > rva22s64
> > > profiles lack PMP entries, causing hart isolation configuration
> > > to fail [1].
> > > 
> > > [1]
> > > https://lists.nongnu.org/archive/html/qemu-riscv/2026-01/msg00048.html
> > > 
> > 
> 
> 
> Is this change temporary ? This change to rva23 is intentional and we
> want to continue to use it so we can use rvv 1.0 switching back in a
> less than ideal 
> Can you explore more 

Yes, I can. It seems possible to enable PMP support on Qemu with rva23.

Kind regards,
Thomas Perrot

> 
> 
> > 
> > > Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
> > > ---
> > >   meta/conf/machine/include/riscv/qemuriscv.inc               | 2
> > > +-
> > >   meta/recipes-bsp/opensbi/{opensbi_1.7.bb => opensbi_1.8.bb} | 2
> > > +-
> > >   2 files changed, 2 insertions(+), 2 deletions(-)
> > >   rename meta/recipes-bsp/opensbi/{opensbi_1.7.bb =>
> > > opensbi_1.8.bb} (97%)
> > > 
> > > diff --git a/meta/conf/machine/include/riscv/qemuriscv.inc
> > > b/meta/conf/machine/include/riscv/qemuriscv.inc
> > > index b755d32c9d1a..45fcf36e62d9 100644
> > > --- a/meta/conf/machine/include/riscv/qemuriscv.inc
> > > +++ b/meta/conf/machine/include/riscv/qemuriscv.inc
> > > @@ -27,7 +27,7 @@ UBOOT_ENTRYPOINT:riscv64 = "0x80200000"
> > >   # qemuboot options
> > >   QB_SMP ?= "-smp 4"
> > >   QB_KERNEL_CMDLINE_APPEND = "earlycon=sbi"
> > > -QB_CPU:riscv64 ?= "-cpu rva23s64"
> > > +QB_CPU:riscv64 ?= "-cpu rv64"
> > >   QB_MACHINE = "-machine virt"
> > >   QB_DEFAULT_BIOS = "fw_jump.elf"
> > >   QB_TAP_OPT = "-netdev
> > > tap,id=net0,ifname=@TAP@,script=no,downscript=no"
> > > diff --git a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
> > > b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > > similarity index 97%
> > > rename from meta/recipes-bsp/opensbi/opensbi_1.7.bb
> > > rename to meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > > index a460062e9398..f2d3e9f20082 100644
> > > --- a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
> > > +++ b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
> > > @@ -8,7 +8,7 @@ require opensbi-payloads.inc
> > > 
> > >   inherit deploy
> > > 
> > > -SRCREV = "a32a91069119e7a5aa31e6bc51d5e00860be3d80"
> > > +SRCREV = "e7fa66c2160ec139de1853a00f669c09320a9256"
> > >   SRC_URI =
> > > "git://github.com/riscv/opensbi.git;branch=master;protocol=https"
> > 
> > Can you please also try including tag=v${PV} in the SRC_URI ?
> > 
> > >   TARGET_DBGSRC_DIR = "/share/opensbi/*/generic/firmware/"
> > > --
> > > 2.52.0
> > > 
> > > 
> > > 
> > > 
> > 
> > 
> > 
> 
> -=-=-=-=-=-=-=-=-=-=-=-
> Links: You receive all messages sent to this group.
> View/Reply Online (#228942):
> https://lists.openembedded.org/g/openembedded-core/message/228942
> Mute This Topic: https://lists.openembedded.org/mt/117115594/5443093
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> https://lists.openembedded.org/g/openembedded-core/unsub [
> thomas.perrot@bootlin.com]
> -=-=-=-=-=-=-=-=-=-=-=-
diff mbox series

Patch

diff --git a/meta/conf/machine/include/riscv/qemuriscv.inc b/meta/conf/machine/include/riscv/qemuriscv.inc
index b755d32c9d1a..45fcf36e62d9 100644
--- a/meta/conf/machine/include/riscv/qemuriscv.inc
+++ b/meta/conf/machine/include/riscv/qemuriscv.inc
@@ -27,7 +27,7 @@  UBOOT_ENTRYPOINT:riscv64 = "0x80200000"
 # qemuboot options
 QB_SMP ?= "-smp 4"
 QB_KERNEL_CMDLINE_APPEND = "earlycon=sbi"
-QB_CPU:riscv64 ?= "-cpu rva23s64"
+QB_CPU:riscv64 ?= "-cpu rv64"
 QB_MACHINE = "-machine virt"
 QB_DEFAULT_BIOS = "fw_jump.elf"
 QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no"
diff --git a/meta/recipes-bsp/opensbi/opensbi_1.7.bb b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
similarity index 97%
rename from meta/recipes-bsp/opensbi/opensbi_1.7.bb
rename to meta/recipes-bsp/opensbi/opensbi_1.8.bb
index a460062e9398..f2d3e9f20082 100644
--- a/meta/recipes-bsp/opensbi/opensbi_1.7.bb
+++ b/meta/recipes-bsp/opensbi/opensbi_1.8.bb
@@ -8,7 +8,7 @@  require opensbi-payloads.inc
 
 inherit deploy
 
-SRCREV = "a32a91069119e7a5aa31e6bc51d5e00860be3d80"
+SRCREV = "e7fa66c2160ec139de1853a00f669c09320a9256"
 SRC_URI = "git://github.com/riscv/opensbi.git;branch=master;protocol=https"
 
 TARGET_DBGSRC_DIR = "/share/opensbi/*/generic/firmware/"