@@ -139,7 +139,8 @@ SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \
file://hw-display-qxl-Pass-requested-buffer-size-to-qxl_phy.patch \
file://CVE-2023-0330.patch \
file://CVE-2023-3354.patch \
- "
+ file://CVE-2020-24165.patch \
+ "
UPSTREAM_CHECK_REGEX = "qemu-(?P<pver>\d+(\.\d+)+)\.tar"
SRC_URI[md5sum] = "278eeb294e4b497e79af7a57e660cb9a"
new file mode 100644
@@ -0,0 +1,94 @@
+CVE: CVE-2020-24165
+Upstream-Status: Backport [https://github.com/qemu/qemu/commit/886cc68943ebe8cf7e5f970be33459f95068a441 ]
+Signed-off-by: Lee Chee Yang <chee.yang.lee@intel.com>
+
+From 886cc68943ebe8cf7e5f970be33459f95068a441 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>
+Date: Fri, 14 Feb 2020 14:49:52 +0000
+Subject: [PATCH] accel/tcg: fix race in cpu_exec_step_atomic (bug 1863025)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The bug describes a race whereby cpu_exec_step_atomic can acquire a TB
+which is invalidated by a tb_flush before we execute it. This doesn't
+affect the other cpu_exec modes as a tb_flush by it's nature can only
+occur on a quiescent system. The race was described as:
+
+ B2. tcg_cpu_exec => cpu_exec => tb_find => tb_gen_code
+ B3. tcg_tb_alloc obtains a new TB
+
+ C3. TB obtained with tb_lookup__cpu_state or tb_gen_code
+ (same TB as B2)
+
+ A3. start_exclusive critical section entered
+ A4. do_tb_flush is called, TB memory freed/re-allocated
+ A5. end_exclusive exits critical section
+
+ B2. tcg_cpu_exec => cpu_exec => tb_find => tb_gen_code
+ B3. tcg_tb_alloc reallocates TB from B2
+
+ C4. start_exclusive critical section entered
+ C5. cpu_tb_exec executes the TB code that was free in A4
+
+The simplest fix is to widen the exclusive period to include the TB
+lookup. As a result we can drop the complication of checking we are in
+the exclusive region before we end it.
+
+Cc: Yifan <me@yifanlu.com>
+Buglink: https://bugs.launchpad.net/qemu/+bug/1863025
+Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
+Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
+Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
+Message-Id: <20200214144952.15502-1-alex.bennee@linaro.org>
+Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
+---
+ accel/tcg/cpu-exec.c | 21 +++++++++++----------
+ 1 file changed, 11 insertions(+), 10 deletions(-)
+
+diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
+index 2560c90eec79..d95c4848a47b 100644
+--- a/accel/tcg/cpu-exec.c
++++ b/accel/tcg/cpu-exec.c
+@@ -240,6 +240,8 @@ void cpu_exec_step_atomic(CPUState *cpu)
+ uint32_t cf_mask = cflags & CF_HASH_MASK;
+
+ if (sigsetjmp(cpu->jmp_env, 0) == 0) {
++ start_exclusive();
++
+ tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
+ if (tb == NULL) {
+ mmap_lock();
+@@ -247,8 +249,6 @@ void cpu_exec_step_atomic(CPUState *cpu)
+ mmap_unlock();
+ }
+
+- start_exclusive();
+-
+ /* Since we got here, we know that parallel_cpus must be true. */
+ parallel_cpus = false;
+ cc->cpu_exec_enter(cpu);
+@@ -271,14 +271,15 @@ void cpu_exec_step_atomic(CPUState *cpu)
+ qemu_plugin_disable_mem_helpers(cpu);
+ }
+
+- if (cpu_in_exclusive_context(cpu)) {
+- /* We might longjump out of either the codegen or the
+- * execution, so must make sure we only end the exclusive
+- * region if we started it.
+- */
+- parallel_cpus = true;
+- end_exclusive();
+- }
++
++ /*
++ * As we start the exclusive region before codegen we must still
++ * be in the region if we longjump out of either the codegen or
++ * the execution.
++ */
++ g_assert(cpu_in_exclusive_context(cpu));
++ parallel_cpus = true;
++ end_exclusive();
+ }
+
+ struct tb_desc {