diff mbox series

arm-bsp/edk2-firmware: backport a patch to fix builds with host gcc15

Message ID 20251006152526.2401666-1-ross.burton@arm.com
State New
Headers show
Series arm-bsp/edk2-firmware: backport a patch to fix builds with host gcc15 | expand

Commit Message

Ross Burton Oct. 6, 2025, 3:25 p.m. UTC
Backport a patch from upstream to fix the build of antlr with GCC 15 on
the host.

The build still fails with clang, so update the message with the current
error message.

Signed-off-by: Ross Burton <ross.burton@arm.com>
---
 .../recipes-bsp/uefi/edk2-firmware_202408.bb  |  7 ++-
 .../0001-BaseTools-Pccts-set-C-standard.patch | 47 +++++++++++++++++++
 2 files changed, 52 insertions(+), 2 deletions(-)
 create mode 100644 meta-arm-bsp/recipes-bsp/uefi/files/0001-BaseTools-Pccts-set-C-standard.patch
diff mbox series

Patch

diff --git a/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202408.bb b/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202408.bb
index ea03d47ba1..fa44e28f7f 100644
--- a/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202408.bb
+++ b/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware_202408.bb
@@ -1,9 +1,12 @@ 
 SRCREV_edk2           ?= "b158dad150bf02879668f72ce306445250838201"
 SRCREV_edk2-platforms ?= "a3c898956a4d48dc5980336fa6ce6eeb23c4f72b"
 
-SRC_URI += "file://0001-Platform-StMmRpmb-Fix-build.patch;patchdir=edk2-platforms"
+SRC_URI += "file://0001-Platform-StMmRpmb-Fix-build.patch;patchdir=edk2-platforms \
+            file://0001-BaseTools-Pccts-set-C-standard.patch"
 
-# FIXME - clang is having issues with antlr
+# FIXME:
+# ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type03/MiscChassisManufacturerFunction.c:146:37:
+# error: variable 'ContainedElements' is uninitialized when passed as a const pointer argument here [-Werror,-Wuninitialized-const-pointer]
 TOOLCHAIN:aarch64 = "gcc"
 
 require recipes-bsp/uefi/edk2-firmware.inc
diff --git a/meta-arm-bsp/recipes-bsp/uefi/files/0001-BaseTools-Pccts-set-C-standard.patch b/meta-arm-bsp/recipes-bsp/uefi/files/0001-BaseTools-Pccts-set-C-standard.patch
new file mode 100644
index 0000000000..058073c9d8
--- /dev/null
+++ b/meta-arm-bsp/recipes-bsp/uefi/files/0001-BaseTools-Pccts-set-C-standard.patch
@@ -0,0 +1,47 @@ 
+From e063f8b8a53861043b9872cc35b08a3dc03b0942 Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 20 Jan 2025 09:40:31 +0100
+Subject: [PATCH] BaseTools/Pccts: set C standard
+
+The prehistoric code base doesn't build with ISO C23.  Set the C
+standard to C11 (for both clang and gcc) so it continues to build with
+gcc 15 (which uses C23 by default).
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+
+Upstream-Status: Backport [e063f8b8a53861043b9872cc35b08a3dc03b0942]
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+---
+ BaseTools/Source/C/VfrCompile/Pccts/antlr/makefile | 2 +-
+ BaseTools/Source/C/VfrCompile/Pccts/dlg/makefile   | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/BaseTools/Source/C/VfrCompile/Pccts/antlr/makefile b/BaseTools/Source/C/VfrCompile/Pccts/antlr/makefile
+index 746d58b5e2..b47c8a37af 100644
+--- a/BaseTools/Source/C/VfrCompile/Pccts/antlr/makefile
++++ b/BaseTools/Source/C/VfrCompile/Pccts/antlr/makefile
+@@ -169,7 +169,7 @@ ANTLR=${BIN_DIR}/antlr
+ DLG=${BIN_DIR}/dlg
+ OBJ_EXT=o
+ OUT_OBJ = -o
+-CFLAGS= $(COPT) -I. -I$(SET) -I$(PCCTS_H) -DUSER_ZZSYN $(COTHER) -DZZLEXBUFSIZE=65536
++CFLAGS= $(COPT) -I. -I$(SET) -I$(PCCTS_H) -DUSER_ZZSYN $(COTHER) -DZZLEXBUFSIZE=65536 -std=gnu11
+ CPPFLAGS=
+ #
+ # SGI Users, use this CFLAGS
+diff --git a/BaseTools/Source/C/VfrCompile/Pccts/dlg/makefile b/BaseTools/Source/C/VfrCompile/Pccts/dlg/makefile
+index e45ac98e04..d72bee3d70 100644
+--- a/BaseTools/Source/C/VfrCompile/Pccts/dlg/makefile
++++ b/BaseTools/Source/C/VfrCompile/Pccts/dlg/makefile
+@@ -123,7 +123,7 @@ endif
+ COPT=-O
+ ANTLR=${BIN_DIR}/antlr
+ DLG=${BIN_DIR}/dlg
+-CFLAGS= $(COPT) -I. -I$(SET) -I$(PCCTS_H) -DUSER_ZZSYN -DZZLEXBUFSIZE=65536
++CFLAGS= $(COPT) -I. -I$(SET) -I$(PCCTS_H) -DUSER_ZZSYN -DZZLEXBUFSIZE=65536 -std=gnu11
+ CPPFLAGS=
+ OBJ_EXT=o
+ OUT_OBJ = -o
+-- 
+2.43.0
+