@@ -6,6 +6,12 @@
require conf/machine/include/arm/arch-armv8-5a.inc
+# Set variables here to make it easier to change Instruction Set Architectures
+# on the FVP Base machine, which should make it easier to test both the tunes
+# and the virtual hardware. These variables are set via the DEFAULT_TUNE
+ARM_ISA_MAJOR = "${@int(d.getVar('ARMPKGARCH').split('v')[1][0])}"
+ARM_ISA_MINOR = "${@int(d.getVar('ARMPKGARCH')[d.getVar('ARMPKGARCH').find('-')+1]) if '-' in d.getVar('ARMPKGARCH') else 0 }"
+
ARM_SYSTEMREADY_FIRMWARE = "trusted-firmware-a:do_deploy"
ARM_SYSTEMREADY_ACS_CONSOLE = "default"
EXTRA_IMAGEDEPENDS = "${ARM_SYSTEMREADY_FIRMWARE}"
@@ -55,9 +61,12 @@ FVP_CONFIG[cluster1.stage12_tlb_size] ?= "1024"
FVP_CONFIG[bp.secureflashloader.fname] ?= "bl1-fvp.bin"
FVP_CONFIG[bp.flashloader0.fname] ?= "fip-fvp.bin"
FVP_CONFIG[bp.virtioblockdevice.image_path] ?= "${IMAGE_NAME}.wic"
-# Set the baseline to ARMv8.5, as the default is 8.0.
-FVP_CONFIG[cluster0.has_arm_v8-5] = "1"
-FVP_CONFIG[cluster1.has_arm_v8-5] = "1"
+
+# FVP Base default is 8.0, so there is no has_arm_v8-0 for it. However, this is needed for every version after. So set this accordingly
+FVP_EXTRA_ARGS = "--parameter cluster0.has_arm_v${ARM_ISA_MAJOR}-${ARM_ISA_MINOR}=1 --parameter cluster1.has_arm_v${ARM_ISA_MAJOR}-${ARM_ISA_MINOR}=1"
+FVP_EXTRA_ARGS += "${@bb.utils.contains('TUNE_FEATURES', 'sve', '--parameter cluster0.has_sve=1 --parameter cluster1.has_sve=1', '', d)}"
+FVP_EXTRA_ARGS += "${@bb.utils.contains('TUNE_FEATURES', 'sve2', '--parameter cluster0.sve.has_sve2=1 --parameter cluster1.sve.has_sve2=1', '', d)}"
+
FVP_CONSOLES[default] = "terminal_0"
FVP_TERMINALS[bp.terminal_0] ?= "Console"
FVP_TERMINALS[bp.terminal_1] ?= ""
@@ -63,8 +63,8 @@ TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip"
EXTRA_OEMAKE += "FVP_DT_PREFIX=fvp-base-gicv3-psci-1t FVP_USE_GIC_DRIVER=FVP_GICV3"
-# Our fvp-base machine explicitly has v8.4 cores
-EXTRA_OEMAKE += "ARM_ARCH_MAJOR=8 ARM_ARCH_MINOR=4"
+# Set the ISA to fvp-base conf file and disable AArch32 system registers
+EXTRA_OEMAKE += "ARM_ARCH_MAJOR=${ARM_ISA_MAJOR} ARM_ARCH_MINOR=${ARM_ISA_MINOR} CTX_INCLUDE_AARCH32_REGS=0"
# If GENERATE_COT is set, then tf-a will try to use local poetry install
# to run the python cot-dt2c command. Disable the local poetry and use
Add variables for setting the Major and Minor version of the ARM Instruction Set Architecture, and add those variables in the various places needed for the FVP Base virtual machine to run with those instructions. Signed-off-by: Jon Mason <jon.mason@arm.com> --- meta-arm-bsp/conf/machine/fvp-base.conf | 15 ++++++++++++--- .../trusted-firmware-a-fvp-base.inc | 4 ++-- 2 files changed, 14 insertions(+), 5 deletions(-)