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[1/1] arm-bsp/documentation: corstone1000: Fix typos in the documentation

Message ID 20250409085736.169671-2-yogesh.wani@arm.com
State New
Headers show
Series [1/1] arm-bsp/documentation: corstone1000: Fix typos in the documentation | expand

Commit Message

Yogesh Wani April 9, 2025, 8:57 a.m. UTC
The Corstone-1000 read the docs had some small typos in the
Design Overview section. Commit addresses these.

Copyright information now updated.

Signed-off-by: Yogesh Wani <yogesh.wani@arm.com>
---
 .../documentation/corstone1000/software-architecture.rst    | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
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Patch

diff --git a/meta-arm-bsp/documentation/corstone1000/software-architecture.rst b/meta-arm-bsp/documentation/corstone1000/software-architecture.rst
index 95156013..3edd2280 100644
--- a/meta-arm-bsp/documentation/corstone1000/software-architecture.rst
+++ b/meta-arm-bsp/documentation/corstone1000/software-architecture.rst
@@ -1,5 +1,5 @@ 
 ..
- # Copyright (c) 2022-2024, Arm Limited.
+ # Copyright (c) 2022-2025, Arm Limited.
  #
  # SPDX-License-Identifier: MIT
 
@@ -46,7 +46,7 @@  Each subsystem provides different functionality to overall SoC.
 
 
 The Secure Enclave System, provides PSA Root of Trust (RoT) and
-cryptographic functions. It is based on an Cortex-M0+ processor,
+cryptographic functions. It is based on a Cortex-M0+ processor,
 CC312 Cryptographic Accelerator and peripherals, such as watchdog and
 secure flash. Software running on the Secure Enclave is isolated via
 hardware for enhanced security. Communication with the Secure Encalve
@@ -80,7 +80,7 @@  development.
 Overall, the Corstone-1000 architecture is designed to cover a range
 of Power, Performance, and Area (PPA) applications, and enable extension
 for use-case specific applications, for example, sensors, cloud
-connectivitiy, and edge computing.
+connectivity, and edge computing.
 
 *****************
 Secure Boot Chain