| Message ID | 20240516140527.67665-1-emekcan.aras@arm.com |
|---|---|
| Headers | show |
| Series | arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence | expand |
On Thu, 16 May 2024 15:05:26 +0100, emekcan.aras@arm.com wrote: > From: Emekcan Aras <Emekcan.Aras@arm.com> > > Corstone1000 does not properly clean the cache and disable gic interrupts > before the reset. This causes a race condition especially in FVP after reset. > This adds proper sequence before resetting the platform. > > Emekcan Aras (1): > arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence > > [...] Applied, thanks! [1/1] arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence commit: 7bae90d708702934e2f507c7e6e4122cf91160cb Best regards,
From: Emekcan Aras <Emekcan.Aras@arm.com> Corstone1000 does not properly clean the cache and disable gic interrupts before the reset. This causes a race condition especially in FVP after reset. This adds proper sequence before resetting the platform. Emekcan Aras (1): arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence ...-clean-the-cache-and-disable-interru.patch | 46 +++++++++++++++++++ .../trusted-firmware-a-corstone1000.inc | 1 + 2 files changed, 47 insertions(+) create mode 100644 meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch