diff mbox series

[meta-ti,scarthgap] trusted-firmware-a: add power state validation patch for K3 SoCs

Message ID 20250701133654.2985866-1-j-sahu@ti.com
State Rejected
Delegated to: Ryan Eatmon
Headers show
Series [meta-ti,scarthgap] trusted-firmware-a: add power state validation patch for K3 SoCs | expand

Commit Message

Telukula Jeevan Kumar Sahu July 1, 2025, 1:36 p.m. UTC
This commit adds the TI power state validation patch for K3 SoCs to
ensure correct PSCI power state transitions when using the upstream
Trusted Firmware-A (TFA).
This patch is excluded from the am62lxx platform, which uses the
TI-maintained fork.

Signed-off-by: Telukula Jeevan Kumar Sahu <j-sahu@ti.com>
---
 .../trusted-firmware-a-ti.inc                 |  7 +-
 ...e-power-state-validation-for-K3-SoCs.patch | 64 +++++++++++++++++++
 2 files changed, 70 insertions(+), 1 deletion(-)
 create mode 100644 meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch

Comments

Ryan Eatmon July 1, 2025, 3:35 p.m. UTC | #1
We do not want to take feature patches into meta-ti.  It needs to live 
in a repository on a branch.  The only patches we take are Yocto build 
related fixes.


On 7/1/2025 8:36 AM, Telukula Jeevan Kumar Sahu wrote:
> This commit adds the TI power state validation patch for K3 SoCs to
> ensure correct PSCI power state transitions when using the upstream
> Trusted Firmware-A (TFA).
> This patch is excluded from the am62lxx platform, which uses the
> TI-maintained fork.
> 
> Signed-off-by: Telukula Jeevan Kumar Sahu <j-sahu@ti.com>
> ---
>   .../trusted-firmware-a-ti.inc                 |  7 +-
>   ...e-power-state-validation-for-K3-SoCs.patch | 64 +++++++++++++++++++
>   2 files changed, 70 insertions(+), 1 deletion(-)
>   create mode 100644 meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch
> 
> diff --git a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
> index ec52d09c..588ee9d4 100644
> --- a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
> +++ b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
> @@ -5,14 +5,19 @@ PV = "2.13+git"
>   LIC_FILES_CHKSUM = "file://docs/license.rst;md5=6ed7bace7b0bc63021c6eba7b524039e"
>   SRCREV_tfa = "d90bb650fe4cb3784f62214ab5829f4051c38d0a"
>   SRC_URI_TRUSTED_FIRMWARE_A = "git://git.trustedfirmware.org/TF-A/trusted-firmware-a.git;protocol=https"
> +TFA_TI_PATCH = "file://0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch"
>   SRCBRANCH = "master"
>   
>   LIC_FILES_CHKSUM:am62lxx = "file://docs/license.rst;md5=1118e32884721c0be33267bd7ae11130"
>   SRCREV_tfa:am62lxx = "2ab59f45ad0a5d95b5cb339c0f64686954377050"
>   SRC_URI_TRUSTED_FIRMWARE_A:am62lxx = "git://github.com/TexasInstruments/arm-trusted-firmware.git;protocol=https"
> +TFA_TI_PATCH:am62lxx = ""
>   SRCBRANCH:am62lxx = "ti-master"
>   
> -SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A};name=tfa;branch=${SRCBRANCH}"
> +SRC_URI = " \
> +    ${SRC_URI_TRUSTED_FIRMWARE_A};name=tfa;branch=${SRCBRANCH} \
> +    ${TFA_TI_PATCH} \
> +"
>   
>   COMPATIBLE_MACHINE = "k3"
>   
> diff --git a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch
> new file mode 100644
> index 00000000..0ed2a933
> --- /dev/null
> +++ b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch
> @@ -0,0 +1,64 @@
> +From 8f676fc677752ca432b424b9738aac12357a35e7 Mon Sep 17 00:00:00 2001
> +From: Kendall Willis <k-willis@ti.com>
> +Date: Tue, 17 Jun 2025 10:43:30 -0500
> +Subject: [PATCH] feat(ti): enable power state validation for K3 SoCs
> +
> +Add power state validation for K3 SoCs to ensure proper PSCI power state
> +transitions. Defining validate_power_state enables the
> +PSCI_CPU_SUSPEND_AARCH64 capability and, in turn, CPU_SUSPEND.
> +
> +validate_power_state checks if the requested power level and power state
> +are in a valid configuration. If the power state requested is standby,
> +set the core power state to the maximum retention state.
> +
> +Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/39502]
> +Change-Id: Ied3ebdc583b2e5b7c86923705954d763997b324e
> +Signed-off-by: Kendall Willis <k-willis@ti.com>
> +---
> + plat/ti/k3/common/k3_psci.c | 23 +++++++++++++++++++++++
> + 1 file changed, 23 insertions(+)
> +
> +diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
> +index c679344c8..ec37d9f4c 100644
> +--- a/plat/ti/k3/common/k3_psci.c
> ++++ b/plat/ti/k3/common/k3_psci.c
> +@@ -226,6 +226,28 @@ static void __dead2 k3_system_reset(void)
> +         wfi();
> + }
> +
> ++static int k3_validate_power_state(unsigned int power_state, psci_power_state_t *req_state)
> ++{
> ++    unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
> ++    unsigned int pstate = psci_get_pstate_type(power_state);
> ++
> ++    if (pwr_lvl > PLAT_MAX_PWR_LVL)
> ++        return PSCI_E_INVALID_PARAMS;
> ++
> ++    if (pstate == PSTATE_TYPE_STANDBY) {
> ++        /*
> ++         * It's possible to enter standby only on power level 0
> ++         * Ignore any other power level.
> ++         */
> ++        if (pwr_lvl != MPIDR_AFFLVL0)
> ++            return PSCI_E_INVALID_PARAMS;
> ++
> ++        CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE;
> ++    }
> ++
> ++    return PSCI_E_SUCCESS;
> ++}
> ++
> + static void k3_pwr_domain_suspend_to_mode(const psci_power_state_t *target_state, uint8_t mode)
> + {
> +     unsigned int core, proc_id;
> +@@ -286,6 +308,7 @@ static plat_psci_ops_t k3_plat_psci_ops = {
> +     .get_sys_suspend_power_state = k3_get_sys_suspend_power_state,
> +     .system_off = k3_system_off,
> +     .system_reset = k3_system_reset,
> ++    .validate_power_state = k3_validate_power_state,
> + };
> +
> + int plat_setup_psci_ops(uintptr_t sec_entrypoint,
> +--
> +2.34.1
> +
diff mbox series

Patch

diff --git a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
index ec52d09c..588ee9d4 100644
--- a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
+++ b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-ti.inc
@@ -5,14 +5,19 @@  PV = "2.13+git"
 LIC_FILES_CHKSUM = "file://docs/license.rst;md5=6ed7bace7b0bc63021c6eba7b524039e"
 SRCREV_tfa = "d90bb650fe4cb3784f62214ab5829f4051c38d0a"
 SRC_URI_TRUSTED_FIRMWARE_A = "git://git.trustedfirmware.org/TF-A/trusted-firmware-a.git;protocol=https"
+TFA_TI_PATCH = "file://0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch"
 SRCBRANCH = "master"
 
 LIC_FILES_CHKSUM:am62lxx = "file://docs/license.rst;md5=1118e32884721c0be33267bd7ae11130"
 SRCREV_tfa:am62lxx = "2ab59f45ad0a5d95b5cb339c0f64686954377050"
 SRC_URI_TRUSTED_FIRMWARE_A:am62lxx = "git://github.com/TexasInstruments/arm-trusted-firmware.git;protocol=https"
+TFA_TI_PATCH:am62lxx = ""
 SRCBRANCH:am62lxx = "ti-master"
 
-SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A};name=tfa;branch=${SRCBRANCH}"
+SRC_URI = " \
+    ${SRC_URI_TRUSTED_FIRMWARE_A};name=tfa;branch=${SRCBRANCH} \
+    ${TFA_TI_PATCH} \
+"
 
 COMPATIBLE_MACHINE = "k3"
 
diff --git a/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch
new file mode 100644
index 00000000..0ed2a933
--- /dev/null
+++ b/meta-ti-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a/0001-feat-ti-enable-power-state-validation-for-K3-SoCs.patch
@@ -0,0 +1,64 @@ 
+From 8f676fc677752ca432b424b9738aac12357a35e7 Mon Sep 17 00:00:00 2001
+From: Kendall Willis <k-willis@ti.com>
+Date: Tue, 17 Jun 2025 10:43:30 -0500
+Subject: [PATCH] feat(ti): enable power state validation for K3 SoCs
+
+Add power state validation for K3 SoCs to ensure proper PSCI power state
+transitions. Defining validate_power_state enables the
+PSCI_CPU_SUSPEND_AARCH64 capability and, in turn, CPU_SUSPEND.
+
+validate_power_state checks if the requested power level and power state
+are in a valid configuration. If the power state requested is standby,
+set the core power state to the maximum retention state.
+
+Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/39502]
+Change-Id: Ied3ebdc583b2e5b7c86923705954d763997b324e
+Signed-off-by: Kendall Willis <k-willis@ti.com>
+---
+ plat/ti/k3/common/k3_psci.c | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
+index c679344c8..ec37d9f4c 100644
+--- a/plat/ti/k3/common/k3_psci.c
++++ b/plat/ti/k3/common/k3_psci.c
+@@ -226,6 +226,28 @@ static void __dead2 k3_system_reset(void)
+         wfi();
+ }
+ 
++static int k3_validate_power_state(unsigned int power_state, psci_power_state_t *req_state)
++{
++    unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
++    unsigned int pstate = psci_get_pstate_type(power_state);
++
++    if (pwr_lvl > PLAT_MAX_PWR_LVL)
++        return PSCI_E_INVALID_PARAMS;
++
++    if (pstate == PSTATE_TYPE_STANDBY) {
++        /*
++         * It's possible to enter standby only on power level 0
++         * Ignore any other power level.
++         */
++        if (pwr_lvl != MPIDR_AFFLVL0)
++            return PSCI_E_INVALID_PARAMS;
++
++        CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE;
++    }
++
++    return PSCI_E_SUCCESS;
++}
++
+ static void k3_pwr_domain_suspend_to_mode(const psci_power_state_t *target_state, uint8_t mode)
+ {
+     unsigned int core, proc_id;
+@@ -286,6 +308,7 @@ static plat_psci_ops_t k3_plat_psci_ops = {
+     .get_sys_suspend_power_state = k3_get_sys_suspend_power_state,
+     .system_off = k3_system_off,
+     .system_reset = k3_system_reset,
++    .validate_power_state = k3_validate_power_state,
+ };
+ 
+ int plat_setup_psci_ops(uintptr_t sec_entrypoint,
+-- 
+2.34.1
+