| Message ID | 20240711234203.3841594-2-raj.khem@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] mesa: Add packageconfig knob to control tegra gallium driver | expand |
I don't understand. Why setting an earlier CPU (that supports less instructions) solves the problem of trying to execute unsupported instructions? I think Arm folks should look at this. Alex On Fri, 12 Jul 2024 at 01:42, Khem Raj via lists.openembedded.org <raj.khem=gmail.com@lists.openembedded.org> wrote: > > With latest qemu several places where qemu-usermode is used e.g. > nodejs, qtwebengine, chromium, the builds are failing form armv8a > tuned machines (e.g. tegra) which is due to qemu crash ( SIGILL ) > encoutered when 'max' ISA is used ( which is default ), max seems > to use neoverse-n2 equivalent features, which is evident that SIGILL > also happens when using -cpu neoverse-v2, therefore explicitly select > neoverse-v1 for ISA, which works and covers almost all (if not all) > cpu tunes for armv8 we have. > > Signed-off-by: Khem Raj <raj.khem@gmail.com> > --- > meta/conf/machine/include/arm/arch-arm64.inc | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/meta/conf/machine/include/arm/arch-arm64.inc b/meta/conf/machine/include/arm/arch-arm64.inc > index 832d0000acb..9639911d33b 100644 > --- a/meta/conf/machine/include/arm/arch-arm64.inc > +++ b/meta/conf/machine/include/arm/arch-arm64.inc > @@ -42,3 +42,8 @@ TARGET_FPU = "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', '${TARGET_FPU_64} > # support these they're meaningless NOP instructions, so there's very little > # reason not to. > TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '', d)}" > + > +# Fix qemu-user crashes while building nodejs/chromium/qtwebengine, defaults ISA is max and it generate SIGILLs > +# qemu: uncaught target signal 4 (Illegal instruction) - core dumped > +# Select the superset ISA > +QEMU_EXTRAOPTIONS_armv8a = "-cpu neoverse-v1" > > -=-=-=-=-=-=-=-=-=-=-=- > Links: You receive all messages sent to this group. > View/Reply Online (#201796): https://lists.openembedded.org/g/openembedded-core/message/201796 > Mute This Topic: https://lists.openembedded.org/mt/107173682/1686489 > Group Owner: openembedded-core+owner@lists.openembedded.org > Unsubscribe: https://lists.openembedded.org/g/openembedded-core/unsub [alex.kanavin@gmail.com] > -=-=-=-=-=-=-=-=-=-=-=- >
On 12 Jul 2024, at 00:42, Khem Raj via lists.openembedded.org <raj.khem=gmail.com@lists.openembedded.org> wrote: > > With latest qemu several places where qemu-usermode is used e.g. > nodejs, qtwebengine, chromium, the builds are failing form armv8a > tuned machines (e.g. tegra) which is due to qemu crash ( SIGILL ) > encoutered when 'max' ISA is used ( which is default ), max seems > to use neoverse-n2 equivalent features, which is evident that SIGILL > also happens when using -cpu neoverse-v2, therefore explicitly select > neoverse-v1 for ISA, which works and covers almost all (if not all) > cpu tunes for armv8 we have. > > Signed-off-by: Khem Raj <raj.khem@gmail.com> > --- > meta/conf/machine/include/arm/arch-arm64.inc | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/meta/conf/machine/include/arm/arch-arm64.inc b/meta/conf/machine/include/arm/arch-arm64.inc > index 832d0000acb..9639911d33b 100644 > --- a/meta/conf/machine/include/arm/arch-arm64.inc > +++ b/meta/conf/machine/include/arm/arch-arm64.inc > @@ -42,3 +42,8 @@ TARGET_FPU = "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', '${TARGET_FPU_64} > # support these they're meaningless NOP instructions, so there's very little > # reason not to. > TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '', d)}" > + > +# Fix qemu-user crashes while building nodejs/chromium/qtwebengine, defaults ISA is max and it generate SIGILLs > +# qemu: uncaught target signal 4 (Illegal instruction) - core dumped > +# Select the superset ISA > +QEMU_EXTRAOPTIONS_armv8a = "-cpu neoverse-v1” This is definitely the wrong place for this. What machine are you using here? Can you get a gdb to identify what the instruction failing is? Ross
On Fri, Jul 12, 2024 at 6:26 AM Ross Burton <Ross.Burton@arm.com> wrote: > > On 12 Jul 2024, at 00:42, Khem Raj via lists.openembedded.org <raj.khem=gmail.com@lists.openembedded.org> wrote: > > > > With latest qemu several places where qemu-usermode is used e.g. > > nodejs, qtwebengine, chromium, the builds are failing form armv8a > > tuned machines (e.g. tegra) which is due to qemu crash ( SIGILL ) > > encoutered when 'max' ISA is used ( which is default ), max seems > > to use neoverse-n2 equivalent features, which is evident that SIGILL > > also happens when using -cpu neoverse-v2, therefore explicitly select > > neoverse-v1 for ISA, which works and covers almost all (if not all) > > cpu tunes for armv8 we have. > > > > Signed-off-by: Khem Raj <raj.khem@gmail.com> > > --- > > meta/conf/machine/include/arm/arch-arm64.inc | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/meta/conf/machine/include/arm/arch-arm64.inc b/meta/conf/machine/include/arm/arch-arm64.inc > > index 832d0000acb..9639911d33b 100644 > > --- a/meta/conf/machine/include/arm/arch-arm64.inc > > +++ b/meta/conf/machine/include/arm/arch-arm64.inc > > @@ -42,3 +42,8 @@ TARGET_FPU = "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', '${TARGET_FPU_64} > > # support these they're meaningless NOP instructions, so there's very little > > # reason not to. > > TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '', d)}" > > + > > +# Fix qemu-user crashes while building nodejs/chromium/qtwebengine, defaults ISA is max and it generate SIGILLs > > +# qemu: uncaught target signal 4 (Illegal instruction) - core dumped > > +# Select the superset ISA > > +QEMU_EXTRAOPTIONS_armv8a = "-cpu neoverse-v1” > > This is definitely the wrong place for this. What machine are you using here? Can you get a gdb to identify what the instruction failing is? > Looked more into it last night. it happens only with clang/trunk seems to work with binaries built with gcc and clang18 , I guess hold on to it, until further triage. > Ross >
diff --git a/meta/conf/machine/include/arm/arch-arm64.inc b/meta/conf/machine/include/arm/arch-arm64.inc index 832d0000acb..9639911d33b 100644 --- a/meta/conf/machine/include/arm/arch-arm64.inc +++ b/meta/conf/machine/include/arm/arch-arm64.inc @@ -42,3 +42,8 @@ TARGET_FPU = "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', '${TARGET_FPU_64} # support these they're meaningless NOP instructions, so there's very little # reason not to. TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '', d)}" + +# Fix qemu-user crashes while building nodejs/chromium/qtwebengine, defaults ISA is max and it generate SIGILLs +# qemu: uncaught target signal 4 (Illegal instruction) - core dumped +# Select the superset ISA +QEMU_EXTRAOPTIONS_armv8a = "-cpu neoverse-v1"
With latest qemu several places where qemu-usermode is used e.g. nodejs, qtwebengine, chromium, the builds are failing form armv8a tuned machines (e.g. tegra) which is due to qemu crash ( SIGILL ) encoutered when 'max' ISA is used ( which is default ), max seems to use neoverse-n2 equivalent features, which is evident that SIGILL also happens when using -cpu neoverse-v2, therefore explicitly select neoverse-v1 for ISA, which works and covers almost all (if not all) cpu tunes for armv8 we have. Signed-off-by: Khem Raj <raj.khem@gmail.com> --- meta/conf/machine/include/arm/arch-arm64.inc | 5 +++++ 1 file changed, 5 insertions(+)