From patchwork Wed Dec 8 13:58:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1058 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43A23C433FE for ; Wed, 8 Dec 2021 13:59:17 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.12516.1638971953063833090 for ; Wed, 08 Dec 2021 05:59:13 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81EA811FB; Wed, 8 Dec 2021 05:59:11 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 45E2F3F73B; Wed, 8 Dec 2021 05:59:10 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Vishnu Banavath Subject: [PATCH 1/8] arm-bsp/optee-os: increase core heap size Date: Wed, 8 Dec 2021 13:58:53 +0000 Message-Id: <20211208135900.683-2-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:17 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2562 From: Vishnu Banavath This change is to increase optee core heap size to 131072 bytes from its default value to accomodate openAMP and smm-gateway Change-Id: I40912334f59a50bb3baf853bb5ff4b01c3b23966 Signed-off-by: Vishnu Banavath --- ...ne1000-increase-OPTEE-core-heap-size.patch | 29 +++++++++++++++++++ .../optee/optee-os_corstone1000_common.inc | 4 ++- 2 files changed, 32 insertions(+), 1 deletion(-) create mode 100644 meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch diff --git a/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch b/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch new file mode 100644 index 0000000..42babb1 --- /dev/null +++ b/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch @@ -0,0 +1,29 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Vishnu Banavath + +From 5fdf7792ead29784718d30d8a8a5383a994e2fef Mon Sep 17 00:00:00 2001 +From: Vishnu Banavath +Date: Thu, 2 Dec 2021 12:51:11 +0000 +Subject: [PATCH] plat-corstone1000: increase OPTEE core heap size + +This change is to increase optee core heap size to 131072 +from its default value to fit openAMP and smm-gateway +in SEL0 + +Signed-off-by: Vishnu Banavath + +diff --git a/core/arch/arm/plat-corstone1000/conf.mk b/core/arch/arm/plat-corstone1000/conf.mk +index 7a4aa13c..65d652a4 100644 +--- a/core/arch/arm/plat-corstone1000/conf.mk ++++ b/core/arch/arm/plat-corstone1000/conf.mk +@@ -31,6 +31,7 @@ CFG_DDR_SIZE ?= 0x80000000 + CFG_DT_ADDR ?= 0x82100000 + CFG_DTB_MAX_SIZE ?= 0x100000 + ++CFG_CORE_HEAP_SIZE ?= 131072 + $(call force,CFG_PSCI_ARM64,y) + $(call force,CFG_DT,y) + $(call force,CFG_EXTERNAL_DTB_OVERLAY,y) +-- +2.17.1 + diff --git a/meta-arm-bsp/recipes-security/optee/optee-os_corstone1000_common.inc b/meta-arm-bsp/recipes-security/optee/optee-os_corstone1000_common.inc index 9280d72..8a4cf1d 100644 --- a/meta-arm-bsp/recipes-security/optee/optee-os_corstone1000_common.inc +++ b/meta-arm-bsp/recipes-security/optee/optee-os_corstone1000_common.inc @@ -9,7 +9,9 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/corstone1000:" SRC_URI:append = " \ file://0001-plat-corstone1000-add-corstone1000-platform.patch \ file://0002-plat-corstone1000-reserve-3MB-CVM-memory-for-optee.patch \ - file://0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch" + file://0003-plat-corstone1000-add-a-rule-in-Makefile-to-SP_MAKEF.patch \ + file://0004-plat-corstone1000-increase-OPTEE-core-heap-size.patch \ + " COMPATIBLE_MACHINE = "corstone1000" From patchwork Wed Dec 8 13:58:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BDC5C433EF for ; Wed, 8 Dec 2021 13:59:17 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.12362.1638971953524901141 for ; Wed, 08 Dec 2021 05:59:13 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 29684D6E; Wed, 8 Dec 2021 05:59:13 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E19893F73B; Wed, 8 Dec 2021 05:59:11 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Vishnu Banavath Subject: [PATCH 2/8] arm/optee-spdevkit: add missing header file in optee-spdevkit Date: Wed, 8 Dec 2021 13:58:54 +0000 Message-Id: <20211208135900.683-3-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:17 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2563 From: Vishnu Banavath This change is to add following header file to optee-spdevkit and these are required by openAMP: * features.h * error.h Change-Id: I51b801911b5a0131bf938ac1d520c4818e416637 Signed-off-by: Vishnu Banavath --- .../optee/optee-spdevkit_git.bb | 183 ++++++++++++++++++ 1 file changed, 183 insertions(+) diff --git a/meta-arm/recipes-security/optee/optee-spdevkit_git.bb b/meta-arm/recipes-security/optee/optee-spdevkit_git.bb index f23cfa7..16ad751 100644 --- a/meta-arm/recipes-security/optee/optee-spdevkit_git.bb +++ b/meta-arm/recipes-security/optee/optee-spdevkit_git.bb @@ -106,6 +106,189 @@ EOF #endif /* STDBOOL_H */ EOF + +cat > ${D}${includedir}/optee/export-user_sp/include/features.h <<'EOF' + #ifndef _FEATURES_H + #define _FEATURES_H + #if defined(_ALL_SOURCE) && !defined(_GNU_SOURCE) + #define _GNU_SOURCE 1 +#endif + #if defined(_DEFAULT_SOURCE) && !defined(_BSD_SOURCE) + #define _BSD_SOURCE 1 +#endif + #if !defined(_POSIX_SOURCE) && !defined(_POSIX_C_SOURCE) \ + && !defined(_XOPEN_SOURCE) && !defined(_GNU_SOURCE) \ + && !defined(_BSD_SOURCE) && !defined(__STRICT_ANSI__) + #define _BSD_SOURCE 1 + #define _XOPEN_SOURCE 700 +#endif + #if __STDC_VERSION__ >= 199901L + #define __restrict restrict + #elif !defined(__GNUC__) + #define __restrict +#endif + #if __STDC_VERSION__ >= 199901L || defined(__cplusplus) + #define __inline inline + #elif !defined(__GNUC__) + #define __inline +#endif + #if __STDC_VERSION__ >= 201112L + #elif defined(__GNUC__) + #define _Noreturn __attribute__((__noreturn__)) +#else + #define _Noreturn +#endif + #define __REDIR(x,y) __typeof__(x) x __asm__(#y) +#endif +EOF +cat > ${D}${includedir}/optee/export-user_sp/include/errno.h <<'EOF' + #ifndef _ERRNO_H + #define _ERRNO_H + #include + #define EPERM 1 + #define ENOENT 2 + #define ESRCH 3 + #define EINTR 4 + #define EIO 5 + #define ENXIO 6 + #define E2BIG 7 + #define ENOEXEC 8 + #define EBADF 9 + #define ECHILD 10 + #define EAGAIN 11 + #define ENOMEM 12 + #define EACCES 13 + #define EFAULT 14 + #define ENOTBLK 15 + #define EBUSY 16 + #define EEXIST 17 + #define EXDEV 18 + #define ENODEV 19 + #define ENOTDIR 20 + #define EISDIR 21 + #define EINVAL 22 + #define ENFILE 23 + #define EMFILE 24 + #define ENOTTY 25 + #define ETXTBSY 26 + #define EFBIG 27 + #define ENOSPC 28 + #define ESPIPE 29 + #define EROFS 30 + #define EMLINK 31 + #define EPIPE 32 + #define EDOM 33 + #define ERANGE 34 + #define EDEADLK 35 + #define ENAMETOOLONG 36 + #define ENOLCK 37 + #define ENOSYS 38 + #define ENOTEMPTY 39 + #define ELOOP 40 + #define EWOULDBLOCK EAGAIN + #define ENOMSG 42 + #define EIDRM 43 + #define ECHRNG 44 + #define EL2NSYNC 45 + #define EL3HLT 46 + #define EL3RST 47 + #define ELNRNG 48 + #define EUNATCH 49 + #define ENOCSI 50 + #define EL2HLT 51 + #define EBADE 52 + #define EBADR 53 + #define EXFULL 54 + #define ENOANO 55 + #define EBADRQC 56 + #define EBADSLT 57 + #define EDEADLOCK EDEADLK + #define EBFONT 59 + #define ENOSTR 60 + #define ENODATA 61 + #define ETIME 62 + #define ENOSR 63 + #define ENONET 64 + #define ENOPKG 65 + #define EREMOTE 66 + #define ENOLINK 67 + #define EADV 68 + #define ESRMNT 69 + #define ECOMM 70 + #define EPROTO 71 + #define EMULTIHOP 72 + #define EDOTDOT 73 + #define EBADMSG 74 + #define EOVERFLOW 75 + #define ENOTUNIQ 76 + #define EBADFD 77 + #define EREMCHG 78 + #define ELIBACC 79 + #define ELIBBAD 80 + #define ELIBSCN 81 + #define ELIBMAX 82 + #define ELIBEXEC 83 + #define EILSEQ 84 + #define ERESTART 85 + #define ESTRPIPE 86 + #define EUSERS 87 + #define ENOTSOCK 88 + #define EDESTADDRREQ 89 + #define EMSGSIZE 90 + #define EPROTOTYPE 91 + #define ENOPROTOOPT 92 + #define EPROTONOSUPPORT 93 + #define ESOCKTNOSUPPORT 94 + #define EOPNOTSUPP 95 + #define ENOTSUP EOPNOTSUPP + #define EPFNOSUPPORT 96 + #define EAFNOSUPPORT 97 + #define EADDRINUSE 98 + #define EADDRNOTAVAIL 99 + #define ENETDOWN 100 + #define ENETUNREACH 101 + #define ENETRESET 102 + #define ECONNABORTED 103 + #define ECONNRESET 104 + #define ENOBUFS 105 + #define EISCONN 106 + #define ENOTCONN 107 + #define ESHUTDOWN 108 + #define ETOOMANYREFS 109 + #define ETIMEDOUT 110 + #define ECONNREFUSED 111 + #define EHOSTDOWN 112 + #define EHOSTUNREACH 113 + #define EALREADY 114 + #define EINPROGRESS 115 + #define ESTALE 116 + #define EUCLEAN 117 + #define ENOTNAM 118 + #define ENAVAIL 119 + #define EISNAM 120 + #define EREMOTEIO 121 + #define EDQUOT 122 + #define ENOMEDIUM 123 + #define EMEDIUMTYPE 124 + #define ECANCELED 125 + #define ENOKEY 126 + #define EKEYEXPIRED 127 + #define EKEYREVOKED 128 + #define EKEYREJECTED 129 + #define EOWNERDEAD 130 + #define ENOTRECOVERABLE 131 + #define ERFKILL 132 + #define EHWPOISON 133 + #ifdef __GNUC__ + __attribute__((const)) +#endif + int *__errno_location(void); + #define errno (*__errno_location()) + #ifdef _GNU_SOURCE + extern char *program_invocation_short_name, *program_invocation_name; +#endif +#endif +EOF } PACKAGE_ARCH = "${MACHINE_ARCH}" From patchwork Wed Dec 8 13:58:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1056 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17970C433F5 for ; Wed, 8 Dec 2021 13:59:17 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12450.1638971955198495262 for ; Wed, 08 Dec 2021 05:59:15 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C7760D6E; Wed, 8 Dec 2021 05:59:14 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 895C63F73B; Wed, 8 Dec 2021 05:59:13 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Abdellatif El Khlifi Subject: [PATCH 3/8] arm/secure-partitions: remove platform specific dependencies Date: Wed, 8 Dec 2021 13:58:55 +0000 Message-Id: <20211208135900.683-4-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:17 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2564 From: Abdellatif El Khlifi Keeping the recipe platform independent. Additional components can be added at the platform level. Change-Id: Ib1b0dd8d50486a037257dd99fea0d0ba2c80c7fb Signed-off-by: Abdellatif El Khlifi --- .../trusted-services/secure-partitions_git.bb | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb b/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb index 0c825e6..ca7ff81 100644 --- a/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb +++ b/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb @@ -6,19 +6,12 @@ COMPATIBLE_MACHINE ?= "invalid" PACKAGE_ARCH = "${MACHINE_ARCH}" LICENSE = "Apache-2.0 & BSD-3-Clause & Zlib" -LIC_FILES_CHKSUM = "file://license.rst;md5=ea160bac7f690a069c608516b17997f4 \ - file://../mbedcrypto/LICENSE;md5=302d50a6369f5f22efdb674db908167a \ - file://../nanopb/LICENSE.txt;md5=9db4b73a55a3994384112efcdb37c01f" +LIC_FILES_CHKSUM = "file://license.rst;md5=ea160bac7f690a069c608516b17997f4" -SRC_URI = "git://git.trustedfirmware.org/TS/trusted-services.git;protocol=https;branch=integration;name=ts;destsuffix=git/ts ${SRC_URI_MBED} ${SRC_URI_NANOPB}" - -SRC_URI_MBED = "git://github.com/ARMmbed/mbed-crypto.git;protocol=https;branch=development;name=mbed;destsuffix=git/mbedcrypto" -SRC_URI_NANOPB = "git://github.com/nanopb/nanopb.git;name=nanopb;protocol=https;branch=master;destsuffix=git/nanopb" +SRC_URI = "git://git.trustedfirmware.org/TS/trusted-services.git;protocol=https;branch=integration;name=ts;destsuffix=git/ts" SRCREV_FORMAT = "ts" SRCREV_ts = "c52807cfea6edab5d5c9cc0cfdb18ffe12cfdb0c" -SRCREV_mbed = "cf4a40ba0a3086cabb5a8227245191161fd26383" -SRCREV_nanopb = "df0e92f474f9cca704fe2b31483f0b4d1b1715a4" PV = "0.0+git${SRCPV}" # Which environment to create the secure partions for (opteesp or shim) From patchwork Wed Dec 8 13:58:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1057 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 179F9C4332F for ; Wed, 8 Dec 2021 13:59:18 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.12627.1638971956641008044 for ; Wed, 08 Dec 2021 05:59:17 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 43A47D6E; Wed, 8 Dec 2021 05:59:16 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 310333F73B; Wed, 8 Dec 2021 05:59:15 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Abdellatif El Khlifi Subject: [PATCH 4/8] arm-bsp/secure-partitions: corstone1000: add mbed-crypto and nanopb to platform code Date: Wed, 8 Dec 2021 13:58:56 +0000 Message-Id: <20211208135900.683-5-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:18 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2565 From: Abdellatif El Khlifi Moving dependencies to the BSP. Change-Id: I32abd6c0568030550dda0442a2a4f624967b561c Signed-off-by: Abdellatif El Khlifi --- .../trusted-services/ts-corstone1000.inc | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc index 3fcdf82..36e2da4 100644 --- a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc +++ b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc @@ -2,8 +2,13 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/secure-partitions:" COMPATIBLE_MACHINE = "corstone1000" -SRCREV_ts = "882a2db4f9181fc6ddb505b82262f82e5a0c2fd5" -SRC_URI:append = " file://0001-tools-cmake-common-applying-lowercase-project-convention.patch \ +LIC_FILES_CHKSUM += "file://../mbedcrypto/LICENSE;md5=302d50a6369f5f22efdb674db908167a \ + file://../nanopb/LICENSE.txt;md5=9db4b73a55a3994384112efcdb37c01f" + + +SRC_URI:append = " \ + ${SRC_URI_MBED} ${SRC_URI_NANOPB} \ + file://0001-tools-cmake-common-applying-lowercase-project-convention.patch \ file://0002-fix-EARLY_TA_PATHS-env-variable.patch \ file://0003-se-proxy-dts-add-se-proxy-as-child-node.patch \ file://0004-Update-mm-comm-buffer-region-in-dts-file.patch \ @@ -11,6 +16,14 @@ SRC_URI:append = " file://0001-tools-cmake-common-applying-lowercase-project-con file://0006-Use-device-region.patch \ " +SRCREV_ts = "882a2db4f9181fc6ddb505b82262f82e5a0c2fd5" + +SRC_URI_MBED = "git://github.com/ARMmbed/mbed-crypto.git;protocol=https;branch=development;name=mbed;destsuffix=git/mbedcrypto" +SRCREV_mbed = "cf4a40ba0a3086cabb5a8227245191161fd26383" + +SRC_URI_NANOPB = "git://github.com/nanopb/nanopb.git;name=nanopb;protocol=https;branch=master;destsuffix=git/nanopb" +SRCREV_nanopb = "df0e92f474f9cca704fe2b31483f0b4d1b1715a4" + TS_PLATFORM = "arm/fvp/fvp_base_revc-2xaemv8a" TS_ENVIRONMENT = "opteesp" SP_PACKAGING_METHOD = "embedded" From patchwork Wed Dec 8 13:58:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C9DDC43219 for ; Wed, 8 Dec 2021 13:59:19 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.12518.1638971958325585272 for ; Wed, 08 Dec 2021 05:59:18 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 03BE511FB; Wed, 8 Dec 2021 05:59:18 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9AD803F73B; Wed, 8 Dec 2021 05:59:16 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Abdellatif El Khlifi , Vishnu Banavath Subject: [PATCH 5/8] arm-bsp/secure-partitions: corstone1000: add openamp support in SE proxy SP Date: Wed, 8 Dec 2021 13:58:57 +0000 Message-Id: <20211208135900.683-6-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:19 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2566 From: Abdellatif El Khlifi This change is to fetch and build openamp and libmetal as part of SE proxy secure partitions Change-Id: I251525f830535ceb1e1fc9f994c22a8b149fe7b6 Signed-off-by: Vishnu Banavath --- ...7-Add-openamp-to-SE-proxy-deployment.patch | 259 ++++++++++++++++++ .../trusted-services/ts-corstone1000.inc | 14 +- 2 files changed, 271 insertions(+), 2 deletions(-) create mode 100644 meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0007-Add-openamp-to-SE-proxy-deployment.patch diff --git a/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0007-Add-openamp-to-SE-proxy-deployment.patch b/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0007-Add-openamp-to-SE-proxy-deployment.patch new file mode 100644 index 0000000..c47475e --- /dev/null +++ b/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0007-Add-openamp-to-SE-proxy-deployment.patch @@ -0,0 +1,259 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Vishnu Banavath + +From afaab8162d5e5a22c0a89aebd46ca6480151d19e Mon Sep 17 00:00:00 2001 +From: Vishnu Banavath +Date: Fri, 3 Dec 2021 16:36:51 +0000 +Subject: [PATCH] Add openamp to SE proxy deployment + +Openamp is required to communicate between secure partitions(running on +Cortex-A) and trusted-firmware-m(running on Cortex-M). +These changes are to fetch libmetal and openamp from github repo's +and build it. + +Signed-off-by: Rui Miguel Silva +Signed-off-by: Vishnu Banavath + +diff --git a/deployments/se-proxy/opteesp/CMakeLists.txt b/deployments/se-proxy/opteesp/CMakeLists.txt +index 2fb4bcc..8591826 100644 +--- a/deployments/se-proxy/opteesp/CMakeLists.txt ++++ b/deployments/se-proxy/opteesp/CMakeLists.txt +@@ -86,6 +86,7 @@ add_components(TARGET "se-proxy" + target_sources(se-proxy PRIVATE + se_proxy_sp.c + service_proxy_factory.c ++ lse.S + ) + + #------------------------------------------------------------------------------- +@@ -95,7 +96,6 @@ target_sources(se-proxy PRIVATE + # temporarily force platform - with this change, the build interface to + # an external builder such as a Yocto recipe is unchanged. Should remove + # once the build interface is published. +-set(TS_PLATFORM "arm/fvp/fvp_base_revc-2xaemv8a" CACHE STRING "Overridden" FORCE) + + add_platform(TARGET "se-proxy") + +@@ -110,6 +110,19 @@ include(../../../external/nanopb/nanopb.cmake) + target_link_libraries(se-proxy PRIVATE nanopb::protobuf-nanopb-static) + protobuf_generate_all(TGT "se-proxy" NAMESPACE "protobuf" BASE_DIR "${TS_ROOT}/protocols") + ++# libmetal ++list(APPEND LIBMETAL_EXTERNAL_INCLUDE_PATHS ${SP_DEV_KIT_INCLUDE_DIR}) ++set(LIBMETAL_EXTRA_INCLUDE_PATHS ${LIBMETAL_EXTRA_INCLUDE_PATHS} ++ CACHE STRING "" FORCE) ++include(../../../external/openamp/libmetal.cmake) ++ ++# OpenAMP ++list(APPEND OPENAMP_EXTERNAL_INCLUDE_PATHS ${SP_DEV_KIT_INCLUDE_DIR}) ++set(OPENAMP_EXTRA_INCLUDE_PATHS ${OPENAMP_EXTRA_INCLUDE_PATHS} ++ CACHE STRING "" FORCE) ++include(../../../external/openamp/openamp.cmake) ++target_link_libraries(se-proxy PRIVATE openamp libmetal) ++ + ################################################################# + + target_compile_definitions(se-proxy PRIVATE +diff --git a/deployments/se-proxy/opteesp/lse.S b/deployments/se-proxy/opteesp/lse.S +new file mode 100644 +index 0000000..840683a +--- /dev/null ++++ b/deployments/se-proxy/opteesp/lse.S +@@ -0,0 +1,19 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. ++ */ ++ ++.text ++.globl __aarch64_cas4_acq_rel ++ ++__aarch64_cas4_acq_rel: ++ mov w16, w0 ++ ldaxr w0, [x2] ++ cmp w0, w16 ++0: bne 1f ++ ++ stlxr w17, w1, [x2] ++ cbnz w17, 0b ++1: ret ++ ++ +diff --git a/external/openamp/libmetal.cmake b/external/openamp/libmetal.cmake +new file mode 100644 +index 0000000..3a647e6 +--- /dev/null ++++ b/external/openamp/libmetal.cmake +@@ -0,0 +1,81 @@ ++#------------------------------------------------------------------------------- ++# Copyright (c) 2021 Linaro Limited ++# Copyright (c) 2021, Arm Limited. All rights reserved. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++#------------------------------------------------------------------------------- ++ ++set (LIBMETAL_URL "https://github.com/OpenAMP/libmetal.git" CACHE STRING "libmetal repository URL") ++set (LIBMETAL_INSTALL_PATH "${CMAKE_CURRENT_BINARY_DIR}/libmetal_install" CACHE PATH "libmetal installation directory") ++set (LIBMETAL_PACKAGE_PATH "${LIBMETAL_INSTALL_PATH}/libmetal/cmake" CACHE PATH "libmetal CMake package directory") ++set (LIBMETAL_TARGET_NAME "libmetal") ++set (LIBMETAL_VERSION "f252f0e007fbfb8b3a52b1d5901250ddac96baad" CACHE STRING "The version of libmetal to use") ++ ++if(NOT LIBMETAL_DEBUG) ++ set(LIBMETAL_BUILD_TYPE "Release") ++else() ++ set(LIBMETAL_BUILD_TYPE "Debug") ++endif() ++ ++include(FetchContent) ++ ++# Checking git ++find_program(GIT_COMMAND "git") ++if (NOT GIT_COMMAND) ++ message(FATAL_ERROR "Please install git") ++endif() ++ ++FetchContent_Declare( ++ libmetal ++ GIT_REPOSITORY ${LIBMETAL_URL} ++ GIT_TAG ${LIBMETAL_VERSION} ++) ++ ++# FetchContent_GetProperties exports libmetal_SOURCE_DIR and libmetal_BINARY_DIR variables ++FetchContent_GetProperties(libmetal) ++if(NOT libmetal_POPULATED) ++ message(STATUS "Fetching libmetal") ++ FetchContent_Populate(libmetal) ++endif() ++ ++# Ensure list of include paths is separated correctly ++string(REPLACE ";" "\\;" LIBMETAL_EXTERNAL_INCLUDE_PATHS "${LIBMETAL_EXTERNAL_INCLUDE_PATHS}") ++ ++#Configure the library ++execute_process(COMMAND ++ ${CMAKE_COMMAND} ++ -DCMAKE_BUILD_TYPE=${LIBMETAL_BUILD_TYPE} ++ -DCMAKE_C_COMPILER=${CMAKE_C_COMPILER} ++ -DCMAKE_C_COMPILER_ID=${CMAKE_C_COMPILER_ID} ++ -DCMAKE_TOOLCHAIN_FILE=${TS_EXTERNAL_LIB_TOOLCHAIN_FILE} ++ -DCMAKE_INSTALL_PREFIX=${LIBMETAL_INSTALL_PATH} ++ -DCMAKE_C_FLAGS_DEBUG=${CMAKE_C_FLAGS_DEBUG} ++ -DCMAKE_C_FLAGS=${CMAKE_C_FLAGS} ++ -DCMAKE_C_OUTPUT_EXTENSION=.o ++ -DCMAKE_C_COMPILER_WORKS=true ++ -DCMAKE_SYSTEM_PROCESSOR=arm ++ -DWITH_DOC=off ++ -DWITH_TESTS=off ++ -DWITH_EXAMPLES=off ++ -DWITH_DEFAULT_LOGGER=off ++ -DEXTERNAL_INCLUDE_PATHS=${LIBMETAL_EXTERNAL_INCLUDE_PATHS} ++ -DMACHINE=template ++ ${libmetal_SOURCE_DIR} ++ WORKING_DIRECTORY ++ ${libmetal_BINARY_DIR} ++) ++ ++# Build the library ++execute_process(COMMAND ++ ${CMAKE_COMMAND} --build ${libmetal_BINARY_DIR} -- install ++ RESULT_VARIABLE _exec_error ++ ) ++if (_exec_error) ++ message(FATAL_ERROR "Build step of libmetal failed with ${_exec_error}.") ++endif() ++ ++#Create an imported target to have clean abstraction in the build-system. ++add_library(libmetal STATIC IMPORTED) ++set_property(TARGET libmetal PROPERTY IMPORTED_LOCATION "${LIBMETAL_INSTALL_PATH}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}metal${CMAKE_STATIC_LIBRARY_SUFFIX}") ++set_property(TARGET libmetal PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${LIBMETAL_INSTALL_PATH}/include") +diff --git a/external/openamp/openamp.cmake b/external/openamp/openamp.cmake +new file mode 100644 +index 0000000..aae13ba +--- /dev/null ++++ b/external/openamp/openamp.cmake +@@ -0,0 +1,82 @@ ++#------------------------------------------------------------------------------- ++# Copyright (c) 2021 Linaro Limited ++# Copyright (c) 2021, Arm Limited. All rights reserved. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++#------------------------------------------------------------------------------- ++ ++set (OPENAMP_URL "https://github.com/OpenAMP/open-amp.git" CACHE STRING "OpenAMP repository URL") ++set (OPENAMP_INSTALL_PATH "${CMAKE_CURRENT_BINARY_DIR}/openamp_install" CACHE PATH "OpenAMP installation directory") ++set (OPENAMP_PACKAGE_PATH "${OPENAMP_INSTALL_PATH}/openamp/cmake" CACHE PATH "OpenAMP CMake package directory") ++set (OPENAMP_TARGET_NAME "openamp") ++set (OPENAMP_VERSION "347397decaa43372fc4d00f965640ebde042966d" CACHE STRING "The version of openamp to use") ++ ++ ++if(NOT OPENAMP_DEBUG) ++ set(OPENAMP_BUILD_TYPE "Release") ++else() ++ set(OPENAMP_BUILD_TYPE "Debug") ++endif() ++ ++include(FetchContent) ++ ++# Checking git ++find_program(GIT_COMMAND "git") ++if (NOT GIT_COMMAND) ++ message(FATAL_ERROR "Please install git") ++endif() ++ ++FetchContent_Declare( ++ openamp ++ GIT_REPOSITORY ${OPENAMP_URL} ++ GIT_TAG ${OPENAMP_VERSION} ++) ++ ++# FetchContent_GetProperties exports openamp_SOURCE_DIR and openamp_BINARY_DIR variables ++FetchContent_GetProperties(openamp) ++if(NOT openamp_POPULATED) ++ message(STATUS "Fetching openamp") ++ FetchContent_Populate(openamp) ++endif() ++ ++# Ensure list of include paths is separated correctly ++get_target_property(_libmetal_inc libmetal INTERFACE_INCLUDE_DIRECTORIES) ++set (_openam_external_include_paths ${_libmetal_inc} ${OPENAMP_EXTERNAL_INCLUDE_PATHS}) ++string(REPLACE ";" "\\;" OPENAMP_EXTERNAL_INCLUDE_PATHS "${_openam_external_include_paths}") ++ ++#Configure the library ++execute_process(COMMAND ++ ${CMAKE_COMMAND} ++ -DCMAKE_BUILD_TYPE=${OPENAMP_BUILD_TYPE} ++ -DCMAKE_C_COMPILER=${CMAKE_C_COMPILER} ++ -DCMAKE_C_COMPILER_ID=${CMAKE_C_COMPILER_ID} ++ -DCMAKE_TOOLCHAIN_FILE=${TS_EXTERNAL_LIB_TOOLCHAIN_FILE} ++ -DCMAKE_INSTALL_PREFIX=${OPENAMP_INSTALL_PATH} ++ -DCMAKE_C_FLAGS_DEBUG=${CMAKE_C_FLAGS_DEBUG} ++ -DLIBMETAL_INCLUDE_DIR=${CMAKE_CURRENT_BINARY_DIR}/libmetal/lib/include ++ -DLIBMETAL_LIB=${CMAKE_CURRENT_BINARY_DIR}/libmetal/lib ++ -DCMAKE_C_OUTPUT_EXTENSION=.o ++ -DCMAKE_C_COMPILER_WORKS=true ++ -DCMAKE_SYSTEM_PROCESSOR=arm ++ -DEXTERNAL_INCLUDE_PATHS=${OPENAMP_EXTERNAL_INCLUDE_PATHS} ++ -DMACHINE=template ++ -DRPMSG_BUFFER_SIZE=512 ++ ${openamp_SOURCE_DIR} ++ WORKING_DIRECTORY ++ ${openamp_BINARY_DIR} ++) ++ ++# Build the library ++execute_process(COMMAND ++ ${CMAKE_COMMAND} --build ${openamp_BINARY_DIR} -- install ++ RESULT_VARIABLE _exec_error ++ ) ++if (_exec_error) ++ message(FATAL_ERROR "Build step of OpenAMP failed with ${_exec_error}.") ++endif() ++ ++#Create an imported target to have clean abstraction in the build-system. ++add_library(openamp STATIC IMPORTED) ++set_property(TARGET openamp PROPERTY IMPORTED_LOCATION "${OPENAMP_INSTALL_PATH}/lib/${CMAKE_STATIC_LIBRARY_PREFIX}open_amp${CMAKE_STATIC_LIBRARY_SUFFIX}") ++set_property(TARGET openamp PROPERTY INTERFACE_INCLUDE_DIRECTORIES "${OPENAMP_INSTALL_PATH}/include") +-- +2.17.1 + diff --git a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc index 36e2da4..04bde3c 100644 --- a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc +++ b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc @@ -3,17 +3,21 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/secure-partitions:" COMPATIBLE_MACHINE = "corstone1000" LIC_FILES_CHKSUM += "file://../mbedcrypto/LICENSE;md5=302d50a6369f5f22efdb674db908167a \ - file://../nanopb/LICENSE.txt;md5=9db4b73a55a3994384112efcdb37c01f" + file://../nanopb/LICENSE.txt;md5=9db4b73a55a3994384112efcdb37c01f \ + file://../openamp/LICENSE.md;md5=a8d8cf662ef6bf9936a1e1413585ecbf \ + file://../libmetal/LICENSE.md;md5=fe0b8a4beea8f0813b606d15a3df3d3c \ + " SRC_URI:append = " \ - ${SRC_URI_MBED} ${SRC_URI_NANOPB} \ + ${SRC_URI_MBED} ${SRC_URI_NANOPB} ${SRC_URI_OPENAMP} ${SRC_URI_LIBMETAL} \ file://0001-tools-cmake-common-applying-lowercase-project-convention.patch \ file://0002-fix-EARLY_TA_PATHS-env-variable.patch \ file://0003-se-proxy-dts-add-se-proxy-as-child-node.patch \ file://0004-Update-mm-comm-buffer-region-in-dts-file.patch \ file://0005-Configure-NV-storage-macro.patch \ file://0006-Use-device-region.patch \ + file://0007-Add-openamp-to-SE-proxy-deployment.patch \ " SRCREV_ts = "882a2db4f9181fc6ddb505b82262f82e5a0c2fd5" @@ -24,6 +28,12 @@ SRCREV_mbed = "cf4a40ba0a3086cabb5a8227245191161fd26383" SRC_URI_NANOPB = "git://github.com/nanopb/nanopb.git;name=nanopb;protocol=https;branch=master;destsuffix=git/nanopb" SRCREV_nanopb = "df0e92f474f9cca704fe2b31483f0b4d1b1715a4" +SRC_URI_OPENAMP = "git://github.com/OpenAMP/open-amp.git;name=openamp;protocol=https;branch=master;destsuffix=git/openamp" +SRCREV_openamp = "347397decaa43372fc4d00f965640ebde042966d" + +SRC_URI_LIBMETAL = "git://github.com/OpenAMP/libmetal.git;name=libmetal;protocol=https;branch=main;destsuffix=git/libmetal" +SRCREV_libmetal = "f252f0e007fbfb8b3a52b1d5901250ddac96baad" + TS_PLATFORM = "arm/fvp/fvp_base_revc-2xaemv8a" TS_ENVIRONMENT = "opteesp" SP_PACKAGING_METHOD = "embedded" From patchwork Wed Dec 8 13:58:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18394C433EF for ; Wed, 8 Dec 2021 13:59:21 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12451.1638971959868098554 for ; Wed, 08 Dec 2021 05:59:20 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7EA45D6E; Wed, 8 Dec 2021 05:59:19 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 42A803F73B; Wed, 8 Dec 2021 05:59:18 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Vishnu Banavath Subject: [PATCH 6/8] arm/secure-partitions: pass TS_PLATFORM in the configure task Date: Wed, 8 Dec 2021 13:58:58 +0000 Message-Id: <20211208135900.683-7-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:21 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2567 From: Vishnu Banavath This commit passes the platform name to CMake through the configure task. Change-Id: I7aaf10e3709507c65dd81c31e0301df57bbdf4fc Signed-off-by: Vishnu Banavath --- .../recipes-security/trusted-services/secure-partitions_git.bb | 1 + 1 file changed, 1 insertion(+) diff --git a/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb b/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb index ca7ff81..b8b02e0 100644 --- a/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb +++ b/meta-arm/recipes-security/trusted-services/secure-partitions_git.bb @@ -56,6 +56,7 @@ do_configure() { -DCMAKE_INSTALL_PREFIX=${D}/firmware/sp \ -DSP_DEV_KIT_DIR=${SP_DEV_KIT_DIR} \ -DSP_PACKAGING_METHOD=${SP_PACKAGING_METHOD} \ + -DTS_PLATFORM="${TS_PLATFORM}" \ -S ${S}/$TS_DEPLOYMENT -B "${B}/$TS_DEPLOYMENT" done } From patchwork Wed Dec 8 13:58:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1062 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 220AEC433EF for ; Wed, 8 Dec 2021 13:59:23 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12452.1638971961947980297 for ; Wed, 08 Dec 2021 05:59:22 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A816D6E; Wed, 8 Dec 2021 05:59:21 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DF2D03F73B; Wed, 8 Dec 2021 05:59:19 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Vishnu Banavath Subject: [PATCH 7/8] arm-bsp/secure-partitions: Implement mhu driver Date: Wed, 8 Dec 2021 13:58:59 +0000 Message-Id: <20211208135900.683-8-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:23 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2568 From: Vishnu Banavath This commit adds mhu driver (v2.1 and v2) to the secure partition se_proxy and a conversion layer to communicate with the secure enclave using OpenAmp. Change-Id: I3d7893f2f52fdcfe6aae4c471c261b6ffd76b274 Signed-off-by: Vishnu Banavath --- ...iver-and-the-OpenAmp-conversion-laye.patch | 1083 +++++++++++++++++ .../trusted-services/ts-corstone1000.inc | 5 +- 2 files changed, 1085 insertions(+), 3 deletions(-) create mode 100644 meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0008-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch diff --git a/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0008-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch b/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0008-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch new file mode 100644 index 0000000..7d8bf49 --- /dev/null +++ b/meta-arm-bsp/recipes-security/trusted-services/secure-partitions/0008-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch @@ -0,0 +1,1083 @@ +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Vishnu Banavath + +From 4243448e35da5c500f6e0ea6d68ab2ac23ada986 Mon Sep 17 00:00:00 2001 +From: Vishnu Banavath +Date: Fri, 3 Dec 2021 18:00:46 +0000 +Subject: [PATCH] Implement mhu driver and the OpenAmp conversion layer. + +This commit adds an mhu driver (v2.1 and v2) to the secure +partition se_proxy and a conversion layer to communicate with +the secure enclave using OpenAmp. + +Signed-off-by: Rui Miguel Silva +Signed-off-by: Vishnu Banavath + +diff --git a/deployments/se-proxy/opteesp/default_se-proxy.dts.in b/deployments/se-proxy/opteesp/default_se-proxy.dts.in +index 9f5cf71..f351a59 100644 +--- a/deployments/se-proxy/opteesp/default_se-proxy.dts.in ++++ b/deployments/se-proxy/opteesp/default_se-proxy.dts.in +@@ -17,5 +17,21 @@ + execution-state = <0>; /* AArch64 */ + xlat-granule = <0>; /* 4KiB */ + messaging-method = <0>; /* Direct messaging only */ ++ ++ device-regions { ++ compatible = "arm,ffa-manifest-device-regions"; ++ mhu-sender { ++ /* Armv8 A Foundation Platform values */ ++ base-address = <0x00000000 0x1b820000>; ++ pages-count = <16>; ++ attributes = <0x3>; /* read-write */ ++ }; ++ mhu-receiver { ++ /* Armv8 A Foundation Platform values */ ++ base-address = <0x00000000 0x1b830000>; ++ pages-count = <16>; ++ attributes = <0x3>; /* read-write */ ++ }; ++ }; + }; + }; +diff --git a/platform/drivers/arm/mhu_driver/component.cmake b/platform/drivers/arm/mhu_driver/component.cmake +new file mode 100644 +index 0000000..77a5a50 +--- /dev/null ++++ b/platform/drivers/arm/mhu_driver/component.cmake +@@ -0,0 +1,12 @@ ++#------------------------------------------------------------------------------- ++# Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++#------------------------------------------------------------------------------- ++ ++# Add source files for using mhu driver ++target_sources(${TGT} ++ PRIVATE ++ "${CMAKE_CURRENT_LIST_DIR}/mhu_v2_x.c" ++) +diff --git a/platform/drivers/arm/mhu_driver/mhu_v2.h b/platform/drivers/arm/mhu_driver/mhu_v2.h +new file mode 100644 +index 0000000..2e4ba80 +--- /dev/null ++++ b/platform/drivers/arm/mhu_driver/mhu_v2.h +@@ -0,0 +1,391 @@ ++/* ++ * Copyright (c) 2021 Arm Limited ++ * ++ * Licensed under the Apache License, Version 2.0 (the "License"); ++ * you may not use this file except in compliance with the License. ++ * You may obtain a copy of the License at ++ * ++ * http://www.apache.org/licenses/LICENSE-2.0 ++ * ++ * Unless required by applicable law or agreed to in writing, software ++ * distributed under the License is distributed on an "AS IS" BASIS, ++ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++ * See the License for the specific language governing permissions and ++ * limitations under the License. ++ */ ++ ++/** ++ * \file mhu_v2_x.h ++ * \brief Driver for Arm MHU v2.0 and v2.1 ++ */ ++ ++#ifndef __MHU_V2_X_H__ ++#define __MHU_V2_X_H__ ++ ++#include ++#include ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define MHU_2_X_INTR_NR2R_OFF (0x0u) ++#define MHU_2_X_INTR_R2NR_OFF (0x1u) ++#define MHU_2_1_INTR_CHCOMB_OFF (0x2u) ++ ++#define MHU_2_X_INTR_NR2R_MASK (0x1u << MHU_2_X_INTR_NR2R_OFF) ++#define MHU_2_X_INTR_R2NR_MASK (0x1u << MHU_2_X_INTR_R2NR_OFF) ++#define MHU_2_1_INTR_CHCOMB_MASK (0x1u << MHU_2_1_INTR_CHCOMB_OFF) ++ ++enum mhu_v2_x_frame_t { ++ MHU_V2_X_SENDER_FRAME = 0x0u, ++ MHU_V2_X_RECEIVER_FRAME = 0x1u, ++}; ++ ++enum mhu_v2_x_supported_revisions { ++ MHU_REV_READ_FROM_HW = 0, ++ MHU_REV_2_0, ++ MHU_REV_2_1, ++}; ++ ++struct mhu_v2_x_dev_t { ++ uint32_t base; ++ enum mhu_v2_x_frame_t frame; ++ uint32_t subversion; /*!< Hardware subversion: v2.X */ ++ bool is_initialized; /*!< Indicates if the MHU driver ++ * is initialized and enabled ++ */ ++}; ++ ++/** ++ * \brief MHU v2 error enumeration types. ++ */ ++enum mhu_v2_x_error_t { ++ MHU_V_2_X_ERR_NONE = 0, ++ MHU_V_2_X_ERR_NOT_INIT = -1, ++ MHU_V_2_X_ERR_ALREADY_INIT = -2, ++ MHU_V_2_X_ERR_UNSUPPORTED_VERSION = -3, ++ MHU_V_2_X_ERR_INVALID_ARG = -4, ++ MHU_V_2_X_ERR_GENERAL = -5 ++}; ++ ++/** ++ * \brief Initializes the driver ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] rev MHU revision (if can't be identified from HW) ++ * ++ * Reads the MHU hardware version ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note MHU revision only has to be specified when versions can't be read ++ * from HW (ARCH_MAJOR_REV reg reads as 0x0). ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_driver_init(struct mhu_v2_x_dev_t *dev, ++ enum mhu_v2_x_supported_revisions rev); ++ ++/** ++ * \brief Returns the number of channels implemented. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * Returns the number of channels implemented. ++ * ++ * \return Returns the number of channels implemented. ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++uint32_t mhu_v2_x_get_num_channel_implemented( ++ const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Sends the value over a channel. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Channel to send the value over. ++ * \param[in] val Value to send. ++ * ++ * Sends the value over a channel. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_send(const struct mhu_v2_x_dev_t *dev, ++ uint32_t channel, uint32_t val); ++ ++/** ++ * \brief Clears the channel after the value is send over it. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Channel to clear. ++ * ++ * Clears the channel after the value is send over it. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_clear(const struct mhu_v2_x_dev_t *dev, ++ uint32_t channel); ++ ++/** ++ * \brief Receives the value over a channel. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Channel to receive the value from. ++ * \param[out] value Pointer to variable that will store the value. ++ * ++ * Receives the value over a channel. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_receive( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t *value); ++ ++/** ++ * \brief Sets bits in the Channel Mask. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Which channel's mask to set. ++ * \param[in] mask Mask to be set over a receiver frame. ++ * ++ * Sets bits in the Channel Mask. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_mask_set( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask); ++ ++/** ++ * \brief Clears bits in the Channel Mask. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Which channel's mask to clear. ++ * \param[in] mask Mask to be clear over a receiver frame. ++ * ++ * Clears bits in the Channel Mask. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_mask_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask); ++ ++/** ++ * \brief Enables the Channel interrupt. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Which channel's interrupt to enable. ++ * ++ * Enables the Channel clear interrupt. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_enable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel); ++ ++/** ++ * \brief Disables the Channel interrupt. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Which channel's interrupt to disable. ++ * ++ * Disables the Channel interrupt. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_disable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel); ++ ++/** ++ * \brief Cleares the Channel interrupt. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] channel Which channel's interrupt to clear. ++ * ++ * Cleares the Channel interrupt. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ * \note This function doesn't check if channel is implemented. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel); ++ ++/** ++ * \brief Initiates a MHU transfer with the handshake signals. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * Initiates a MHU transfer with the handshake signals in a blocking mode. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_initiate_transfer( ++ const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Closes a MHU transfer with the handshake signals. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * Closes a MHU transfer with the handshake signals in a blocking mode. ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_close_transfer( ++ const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Returns the value of access request signal. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[out] val Pointer to variable that will store the value. ++ * ++ * For more information please read the MHU v2 user guide ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_get_access_request( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *val); ++ ++/** ++ * \brief Sets the value of access request signal to high. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * For more information please read the MHU v2 user guide ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_set_access_request( ++ const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Sets the value of access request signal to low. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * For more information please read the MHU v2 user guide ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_reset_access_request( ++ const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Returns the value of access ready signal. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[out] val Pointer to variable that will store the value. ++ * ++ * For more information please read the MHU v2 user guide ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_get_access_ready( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *val); ++ ++/** ++ * \brief Returns the MHU interrupt status. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * ++ * \return Interrupt status register value. Masking is needed for individual ++ * interrupts. ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++uint32_t mhu_v2_x_get_interrupt_status(const struct mhu_v2_x_dev_t *dev); ++ ++/** ++ * \brief Enables MHU interrupts. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] mask Bit mask for enabling/disabling interrupts ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_enable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask); ++ ++/** ++ * \brief Disables MHU interrupts. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] mask Bit mask for enabling/disabling interrupts ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_disable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask); ++ ++/** ++ * \brief Clears MHU interrupts. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[in] mask Bit mask for clearing interrupts ++ * ++ * \return Returns mhu_v2_x_error_t error code ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask); ++ ++/** ++ * \brief Returns the first channel number whose interrupt bit is high. ++ * ++ * \param[in] dev MHU device struct \ref mhu_v2_x_dev_t ++ * \param[out] channel Pointer to variable that will have the channel value. ++ * ++ * \return Returns the first channel number whose interrupt bit is high. ++ * \return Returns mhu_v2_x_error_t error code. ++ * ++ * \note This function doesn't check if dev is NULL. ++ */ ++enum mhu_v2_x_error_t mhu_v2_1_get_ch_interrupt_num( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *channel); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __MHU_V2_X_H__ */ +diff --git a/platform/drivers/arm/mhu_driver/mhu_v2_x.c b/platform/drivers/arm/mhu_driver/mhu_v2_x.c +new file mode 100644 +index 0000000..01d8f65 +--- /dev/null ++++ b/platform/drivers/arm/mhu_driver/mhu_v2_x.c +@@ -0,0 +1,602 @@ ++/* ++ * Copyright (c) 2021 Arm Limited ++ * ++ * Licensed under the Apache License, Version 2.0 (the "License"); ++ * you may not use this file except in compliance with the License. ++ * You may obtain a copy of the License at ++ * ++ * http://www.apache.org/licenses/LICENSE-2.0 ++ * ++ * Unless required by applicable law or agreed to in writing, software ++ * distributed under the License is distributed on an "AS IS" BASIS, ++ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++ * See the License for the specific language governing permissions and ++ * limitations under the License. ++ */ ++#include ++#include ++#include "mhu_v2.h" ++ ++#define _MHU_V2_X_MAX_CHANNELS 124 ++#define _MHU_V2_1_MAX_CHCOMB_INT 4 ++#define ENABLE 0x1 ++#define DISABLE 0x0 ++#define CLEAR_INTR 0x1 ++#define CH_PER_CH_COMB 0x20 ++#define SEND_FRAME(p_mhu) ((struct _mhu_v2_x_send_frame_t *)p_mhu) ++#define RECV_FRAME(p_mhu) ((struct _mhu_v2_x_recv_frame_t *)p_mhu) ++ ++#define MHU_MAJOR_REV_V2 0x1u ++#define MHU_MINOR_REV_2_0 0x0u ++#define MHU_MINOR_REV_2_1 0x1u ++ ++struct _mhu_v2_x_send_ch_window_t { ++ /* Offset: 0x00 (R/ ) Channel Status */ ++ volatile uint32_t ch_st; ++ /* Offset: 0x04 (R/ ) Reserved */ ++ volatile uint32_t reserved_0; ++ /* Offset: 0x08 (R/ ) Reserved */ ++ volatile uint32_t reserved_1; ++ /* Offset: 0x0C ( /W) Channel Set */ ++ volatile uint32_t ch_set; ++ /* Offset: 0x10 (R/ ) Channel Interrupt Status (Reserved in 2.0) */ ++ volatile uint32_t ch_int_st; ++ /* Offset: 0x14 ( /W) Channel Interrupt Clear (Reserved in 2.0) */ ++ volatile uint32_t ch_int_clr; ++ /* Offset: 0x18 (R/W) Channel Interrupt Enable (Reserved in 2.0) */ ++ volatile uint32_t ch_int_en; ++ /* Offset: 0x1C (R/ ) Reserved */ ++ volatile uint32_t reserved_2; ++}; ++ ++struct _mhu_v2_x_send_frame_t { ++ /* Offset: 0x000 ( / ) Sender Channel Window 0 -123 */ ++ struct _mhu_v2_x_send_ch_window_t send_ch_window[_MHU_V2_X_MAX_CHANNELS]; ++ /* Offset: 0xF80 (R/ ) Message Handling Unit Configuration */ ++ volatile uint32_t mhu_cfg; ++ /* Offset: 0xF84 (R/W) Response Configuration */ ++ volatile uint32_t resp_cfg; ++ /* Offset: 0xF88 (R/W) Access Request */ ++ volatile uint32_t access_request; ++ /* Offset: 0xF8C (R/ ) Access Ready */ ++ volatile uint32_t access_ready; ++ /* Offset: 0xF90 (R/ ) Interrupt Status */ ++ volatile uint32_t int_st; ++ /* Offset: 0xF94 ( /W) Interrupt Clear */ ++ volatile uint32_t int_clr; ++ /* Offset: 0xF98 (R/W) Interrupt Enable */ ++ volatile uint32_t int_en; ++ /* Offset: 0xF9C (R/ ) Reserved */ ++ volatile uint32_t reserved_0; ++ /* Offset: 0xFA0 (R/W) Channel Combined Interrupt Stat (Reserved in 2.0) */ ++ volatile uint32_t ch_comb_int_st[_MHU_V2_1_MAX_CHCOMB_INT]; ++ /* Offset: ‭0xFC4‬ (R/ ) Reserved */ ++ volatile uint32_t reserved_1[6]; ++ /* Offset: 0xFC8 (R/ ) Implementer Identification Register */ ++ volatile uint32_t iidr; ++ /* Offset: 0xFCC (R/ ) Architecture Identification Register */ ++ volatile uint32_t aidr; ++ /* Offset: 0xFD0 (R/ ) */ ++ volatile uint32_t pid_1[4]; ++ /* Offset: 0xFE0 (R/ ) */ ++ volatile uint32_t pid_0[4]; ++ /* Offset: 0xFF0 (R/ ) */ ++ volatile uint32_t cid[4]; ++}; ++ ++struct _mhu_v2_x_rec_ch_window_t { ++ /* Offset: 0x00 (R/ ) Channel Status */ ++ volatile uint32_t ch_st; ++ /* Offset: 0x04 (R/ ) Channel Status Masked */ ++ volatile uint32_t ch_st_msk; ++ /* Offset: 0x08 ( /W) Channel Clear */ ++ volatile uint32_t ch_clr; ++ /* Offset: 0x0C (R/ ) Reserved */ ++ volatile uint32_t reserved_0; ++ /* Offset: 0x10 (R/ ) Channel Mask Status */ ++ volatile uint32_t ch_msk_st; ++ /* Offset: 0x14 ( /W) Channel Mask Set */ ++ volatile uint32_t ch_msk_set; ++ /* Offset: 0x18 ( /W) Channel Mask Clear */ ++ volatile uint32_t ch_msk_clr; ++ /* Offset: 0x1C (R/ ) Reserved */ ++ volatile uint32_t reserved_1; ++}; ++ ++struct _mhu_v2_x_recv_frame_t { ++ /* Offset: 0x000 ( / ) Receiver Channel Window 0 -123 */ ++ struct _mhu_v2_x_rec_ch_window_t rec_ch_window[_MHU_V2_X_MAX_CHANNELS]; ++ /* Offset: 0xF80 (R/ ) Message Handling Unit Configuration */ ++ volatile uint32_t mhu_cfg; ++ /* Offset: 0xF84 (R/ ) Reserved */ ++ volatile uint32_t reserved_0[3]; ++ /* Offset: 0xF90 (R/ ) Interrupt Status (Reserved in 2.0) */ ++ volatile uint32_t int_st; ++ /* Offset: 0xF94 (R/ ) Interrupt Clear (Reserved in 2.0) */ ++ volatile uint32_t int_clr; ++ /* Offset: 0xF98 (R/W) Interrupt Enable (Reserved in 2.0) */ ++ volatile uint32_t int_en; ++ /* Offset: 0xF9C (R/ ) Reserved */ ++ volatile uint32_t reserved_1; ++ /* Offset: 0xFA0 (R/ ) Channel Combined Interrupt Stat (Reserved in 2.0) */ ++ volatile uint32_t ch_comb_int_st[_MHU_V2_1_MAX_CHCOMB_INT]; ++ /* Offset: 0xFB0 (R/ ) Reserved */ ++ volatile uint32_t reserved_2[6]; ++ /* Offset: 0xFC8 (R/ ) Implementer Identification Register */ ++ volatile uint32_t iidr; ++ /* Offset: 0xFCC (R/ ) Architecture Identification Register */ ++ volatile uint32_t aidr; ++ /* Offset: 0xFD0 (R/ ) */ ++ volatile uint32_t pid_1[4]; ++ /* Offset: 0xFE0 (R/ ) */ ++ volatile uint32_t pid_0[4]; ++ /* Offset: 0xFF0 (R/ ) */ ++ volatile uint32_t cid[4]; ++}; ++ ++union _mhu_v2_x_frame_t { ++ struct _mhu_v2_x_send_frame_t send_frame; ++ struct _mhu_v2_x_recv_frame_t recv_frame; ++}; ++ ++enum mhu_v2_x_error_t mhu_v2_x_driver_init(struct mhu_v2_x_dev_t *dev, ++ enum mhu_v2_x_supported_revisions rev) ++{ ++ uint32_t AIDR = 0; ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if (dev->is_initialized) { ++ return MHU_V_2_X_ERR_ALREADY_INIT; ++ } ++ ++ if (rev == MHU_REV_READ_FROM_HW) { ++ /* Read revision from HW */ ++ if (dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ AIDR = p_mhu->recv_frame.aidr; ++ } else { ++ AIDR = p_mhu->send_frame.aidr; ++ } ++ ++ /* Get bits 7:4 to read major revision */ ++ if ( ((AIDR >> 4) & 0b1111) != MHU_MAJOR_REV_V2) { ++ /* Unsupported MHU version */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } /* No need to save major version, driver only supports MHUv2 */ ++ ++ /* Get bits 3:0 to read minor revision */ ++ dev->subversion = AIDR & 0b1111; ++ ++ if (dev->subversion != MHU_MINOR_REV_2_0 && ++ dev->subversion != MHU_MINOR_REV_2_1) { ++ /* Unsupported subversion */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ } else { ++ /* Revisions were provided by caller */ ++ if (rev == MHU_REV_2_0) { ++ dev->subversion = MHU_MINOR_REV_2_0; ++ } else if (rev == MHU_REV_2_1) { ++ dev->subversion = MHU_MINOR_REV_2_1; ++ } else { ++ /* Unsupported subversion */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ }/* No need to save major version, driver only supports MHUv2 */ ++ } ++ ++ dev->is_initialized = true; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++uint32_t mhu_v2_x_get_num_channel_implemented(const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ return (SEND_FRAME(p_mhu))->mhu_cfg; ++ } else { ++ return (RECV_FRAME(p_mhu))->mhu_cfg; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_send(const struct mhu_v2_x_dev_t *dev, ++ uint32_t channel, uint32_t val) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->send_ch_window[channel].ch_set = val; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_clear(const struct mhu_v2_x_dev_t *dev, ++ uint32_t channel) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ (RECV_FRAME(p_mhu))->rec_ch_window[channel].ch_clr = UINT32_MAX; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_receive( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t *value) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ *value = (RECV_FRAME(p_mhu))->rec_ch_window[channel].ch_st; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_mask_set( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ (RECV_FRAME(p_mhu))->rec_ch_window[channel].ch_msk_set = mask; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_mask_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel, uint32_t mask) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ (RECV_FRAME(p_mhu))->rec_ch_window[channel].ch_msk_clr = mask; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_enable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_1) { ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->send_ch_window[channel].ch_int_en = ENABLE; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_disable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_1) { ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->send_ch_window[channel].ch_int_en = DISABLE; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_channel_interrupt_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t channel) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_1) { ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->send_ch_window[channel].ch_int_clr = CLEAR_INTR; ++ return MHU_V_2_X_ERR_NONE; ++ } else { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_initiate_transfer( ++ const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ (SEND_FRAME(p_mhu))->access_request = ENABLE; ++ ++ while ( !((SEND_FRAME(p_mhu))->access_ready) ) { ++ /* Wait in a loop for access ready signal to be high */ ++ ; ++ } ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_close_transfer(const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ (SEND_FRAME(p_mhu))->access_request = DISABLE; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_get_access_request( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *val) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ *val = (SEND_FRAME(p_mhu))->access_request; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_set_access_request( ++ const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ (SEND_FRAME(p_mhu))->access_request = ENABLE; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_reset_access_request( ++ const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ (SEND_FRAME(p_mhu))->access_request = DISABLE; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_get_access_ready( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *val) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame != MHU_V2_X_SENDER_FRAME) { ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ *val = (SEND_FRAME(p_mhu))->access_ready; ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++uint32_t mhu_v2_x_get_interrupt_status(const struct mhu_v2_x_dev_t *dev) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ return (SEND_FRAME(p_mhu))->int_st; ++ } else { ++ return (RECV_FRAME(p_mhu))->int_st; ++ } ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_enable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_0) { ++ if (mask & MHU_2_1_INTR_CHCOMB_MASK) { ++ /* Combined channel IRQ is not present in v2.0 */ ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ if (dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ /* Only sender frame has these registers */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->int_en |= mask; ++ } else { ++ (RECV_FRAME(p_mhu))->int_en |= mask; ++ } ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_disable( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_0) { ++ if (mask & MHU_2_1_INTR_CHCOMB_MASK) { ++ /* Combined channel IRQ is not present in v2.0 */ ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ if (dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ /* Only sender frame has these registers */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->int_en &= ~mask; ++ } else { ++ (RECV_FRAME(p_mhu))->int_en &= ~mask; ++ } ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_x_interrupt_clear( ++ const struct mhu_v2_x_dev_t *dev, uint32_t mask) ++{ ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion == MHU_MINOR_REV_2_0) { ++ if (mask & MHU_2_1_INTR_CHCOMB_MASK) { ++ /* Combined channel IRQ is not present in v2.0 */ ++ return MHU_V_2_X_ERR_INVALID_ARG; ++ } ++ ++ if (dev->frame == MHU_V2_X_RECEIVER_FRAME) { ++ /* Only sender frame has these registers */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ } ++ ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ (SEND_FRAME(p_mhu))->int_clr = mask; ++ } else { ++ (RECV_FRAME(p_mhu))->int_clr = mask; ++ } ++ ++ return MHU_V_2_X_ERR_NONE; ++} ++ ++enum mhu_v2_x_error_t mhu_v2_1_get_ch_interrupt_num( ++ const struct mhu_v2_x_dev_t *dev, uint32_t *channel) ++{ ++ uint32_t i, j, status; ++ union _mhu_v2_x_frame_t *p_mhu = (union _mhu_v2_x_frame_t *)dev->base; ++ ++ if ( !(dev->is_initialized) ) { ++ return MHU_V_2_X_ERR_NOT_INIT; ++ } ++ ++ if (dev->subversion != MHU_MINOR_REV_2_1) { ++ /* Feature is only supported in MHU v2.1 */ ++ return MHU_V_2_X_ERR_UNSUPPORTED_VERSION; ++ } ++ ++ for(i = 0; i < _MHU_V2_1_MAX_CHCOMB_INT; i++) { ++ if(dev->frame == MHU_V2_X_SENDER_FRAME) { ++ status = (SEND_FRAME(p_mhu))->ch_comb_int_st[i]; ++ } else { ++ status = (RECV_FRAME(p_mhu))->ch_comb_int_st[i]; ++ } ++ ++ for(j = 0; j < CH_PER_CH_COMB; j++) { ++ if ((status >> CH_PER_CH_COMB - j - 1) & (ENABLE)) { ++ *channel = (CH_PER_CH_COMB - j -1 + (i * CH_PER_CH_COMB)); ++ return MHU_V_2_X_ERR_NONE; ++ } ++ } ++ } ++ ++ return MHU_V_2_X_ERR_GENERAL; ++} +diff --git a/platform/providers/arm/corstone1000/platform.cmake b/platform/providers/arm/corstone1000/platform.cmake +new file mode 100644 +index 0000000..bb778bb +--- /dev/null ++++ b/platform/providers/arm/corstone1000/platform.cmake +@@ -0,0 +1,10 @@ ++#------------------------------------------------------------------------------- ++# Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++# Platform definition for the 'fvp_base_revc-2xaem8a' virtual platform. ++#------------------------------------------------------------------------------- ++ ++# include MHU driver ++include(${TS_ROOT}/platform/drivers/arm/mhu_driver/component.cmake) +-- +2.17.1 + diff --git a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc index 04bde3c..acf604f 100644 --- a/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc +++ b/meta-arm-bsp/recipes-security/trusted-services/ts-corstone1000.inc @@ -18,6 +18,7 @@ SRC_URI:append = " \ file://0005-Configure-NV-storage-macro.patch \ file://0006-Use-device-region.patch \ file://0007-Add-openamp-to-SE-proxy-deployment.patch \ + file://0008-Implement-mhu-driver-and-the-OpenAmp-conversion-laye.patch \ " SRCREV_ts = "882a2db4f9181fc6ddb505b82262f82e5a0c2fd5" @@ -34,12 +35,10 @@ SRCREV_openamp = "347397decaa43372fc4d00f965640ebde042966d" SRC_URI_LIBMETAL = "git://github.com/OpenAMP/libmetal.git;name=libmetal;protocol=https;branch=main;destsuffix=git/libmetal" SRCREV_libmetal = "f252f0e007fbfb8b3a52b1d5901250ddac96baad" -TS_PLATFORM = "arm/fvp/fvp_base_revc-2xaemv8a" +TS_PLATFORM = "arm/corstone1000" TS_ENVIRONMENT = "opteesp" SP_PACKAGING_METHOD = "embedded" -EXTRA_OEMAKE += "TS_PLATFORM=${TS_PLATFORM}" - # Secure Enclave proxy secure partition TS_DEPLOYMENTS += "'deployments/se-proxy/${TS_ENVIRONMENT}'" From patchwork Wed Dec 8 13:59:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abdellatif El Khlifi X-Patchwork-Id: 1061 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 182F2C433FE for ; Wed, 8 Dec 2021 13:59:24 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.12380.1638971963515628846 for ; Wed, 08 Dec 2021 05:59:23 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: abdellatif.elkhlifi@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 18DAFD6E; Wed, 8 Dec 2021 05:59:23 -0800 (PST) Received: from e121910.arm.com (unknown [10.57.6.202]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E9E963F73B; Wed, 8 Dec 2021 05:59:21 -0800 (PST) From: abdellatif.elkhlifi@arm.com To: meta-arm@lists.yoctoproject.org, Ross.Burton@arm.com Cc: nd@arm.com, Vishnu Banavath Subject: [PATCH 8/8] arm-bsp/optee-os: add MHU device regions in the SP manifest Date: Wed, 8 Dec 2021 13:59:00 +0000 Message-Id: <20211208135900.683-9-abdellatif.elkhlifi@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> References: <20211208135900.683-1-abdellatif.elkhlifi@arm.com> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 08 Dec 2021 13:59:24 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2569 From: Vishnu Banavath Declaring the MHU device regions nodes. Change-Id: Idc9faf570b8b97193f69ed32fa71a4a3ca359409 Signed-off-by: Vishnu Banavath --- .../corstone1000/sp_manifest_combined_se.dts | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts b/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts index c11a8e6..0be1c81 100644 --- a/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts +++ b/meta-arm-bsp/recipes-security/optee/files/optee-os/corstone1000/sp_manifest_combined_se.dts @@ -17,6 +17,21 @@ execution-state = <0>; /* AArch64 */ xlat-granule = <0>; /* 4KiB */ messaging-method = <0>; /* Direct messaging only */ + device-regions { + compatible = "arm,ffa-manifest-device-regions"; + mhu-sender { + /* Armv8 A Foundation Platform values */ + base-address = <0x00000000 0x1b820000>; + pages-count = <16>; + attributes = <0x3>; /* read-write */ + }; + mhu-receiver { + /* Armv8 A Foundation Platform values */ + base-address = <0x00000000 0x1b830000>; + pages-count = <16>; + attributes = <0x3>; /* read-write */ + }; + }; }; smm-gateway{ compatible = "arm,ffa-manifest-1.0"; @@ -38,4 +53,4 @@ }; }; }; -}; \ No newline at end of file +};