From patchwork Wed Jul 2 21:44:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66152 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C798C83F09 for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web10.8363.1751492667460105804 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2s015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 1/6] u-boot: Dynamic RISC-V ISA configuration Date: Wed, 2 Jul 2025 16:44:19 -0500 Message-Id: <1751492664-12569-2-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219857 From: Mark Hatle Allow the risc-v TUNE_FEATURES to select specific ISA (kconfig) selections via config fragments. This allows the following items to be selected dynamically: CONFIG_RISCV_ISA_C CONFIG_RISCV_ISA_F CONFIG_RISCV_ISA_D CONFIG_RISCV_ISA_ZBB CONFIG_RISCV_ISA_A CONFIG_RISCV_ISA_ZICBOM Signed-off-by: Mark Hatle --- meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_a.cfg | 1 + meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_c.cfg | 1 + .../u-boot/files/u-boot-riscv-isa_clear.cfg | 6 ++++++ meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_d.cfg | 1 + meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_f.cfg | 1 + .../u-boot/files/u-boot-riscv-isa_zbb.cfg | 1 + .../u-boot/files/u-boot-riscv-isa_zicbom.cfg | 1 + meta/recipes-bsp/u-boot/u-boot-common.inc | 12 ++++++++++++ 8 files changed, 24 insertions(+) create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_a.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_c.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_clear.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_d.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_f.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zbb.cfg create mode 100644 meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zicbom.cfg diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_a.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_a.cfg new file mode 100644 index 0000000000..fc45b64480 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_a.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_A=y diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_c.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_c.cfg new file mode 100644 index 0000000000..1cb459f636 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_c.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_C=y diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_clear.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_clear.cfg new file mode 100644 index 0000000000..ce90da23ce --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_clear.cfg @@ -0,0 +1,6 @@ +# CONFIG_RISCV_ISA_C is not set +# CONFIG_RISCV_ISA_F is not set +# CONFIG_RISCV_ISA_D is not set +# CONFIG_RISCV_ISA_ZBB is not set +# CONFIG_RISCV_ISA_A is not set +# CONFIG_RISCV_ISA_ZICBOM is not set diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_d.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_d.cfg new file mode 100644 index 0000000000..fd25fa4e89 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_d.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_D=y diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_f.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_f.cfg new file mode 100644 index 0000000000..dfa9876f82 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_f.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_F=y diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zbb.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zbb.cfg new file mode 100644 index 0000000000..2b71b016f8 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zbb.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_ZBB=y diff --git a/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zicbom.cfg b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zicbom.cfg new file mode 100644 index 0000000000..96daf04b20 --- /dev/null +++ b/meta/recipes-bsp/u-boot/files/u-boot-riscv-isa_zicbom.cfg @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_ZICBOM=y diff --git a/meta/recipes-bsp/u-boot/u-boot-common.inc b/meta/recipes-bsp/u-boot/u-boot-common.inc index 617f5a60bb..8600d4bab6 100644 --- a/meta/recipes-bsp/u-boot/u-boot-common.inc +++ b/meta/recipes-bsp/u-boot/u-boot-common.inc @@ -16,6 +16,18 @@ SRCREV = "34820924edbc4ec7803eb89d9852f4b870fa760a" SRC_URI = "git://source.denx.de/u-boot/u-boot.git;protocol=https;branch=master;tag=v${PV}" +SRC_URI_RISCV = "\ + file://u-boot-riscv-isa_clear.cfg \ + ${@bb.utils.contains ("TUNE_FEATURES", "a", "file://u-boot-riscv-isa_a.cfg", "", d)} \ + ${@bb.utils.contains ("TUNE_FEATURES", "f", "file://u-boot-riscv-isa_f.cfg", "", d)} \ + ${@bb.utils.contains ("TUNE_FEATURES", "d", "file://u-boot-riscv-isa_d.cfg", "", d)} \ + ${@bb.utils.contains_any("TUNE_FEATURES", "b zbb", "file://u-boot-riscv-isa_zbb.cfg", "", d)} \ + ${@bb.utils.contains ("TUNE_FEATURES", "zicbom", "file://u-boot-riscv-isa_zicbom.cfg", "", d)} \ + " + +SRC_URI:append:riscv32 = "${SRC_URI_RISCV}" +SRC_URI:append:riscv64 = "${SRC_URI_RISCV}" + B = "${WORKDIR}/build" inherit pkgconfig From patchwork Wed Jul 2 21:44:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93B78C83F0C for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web11.8315.1751492667127947264 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2t015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 2/6] features_check.bbclass: Add support for required TUNE_FEATURES Date: Wed, 2 Jul 2025 16:44:20 -0500 Message-Id: <1751492664-12569-3-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219855 From: Mark Hatle Signed-off-by: Mark Hatle --- meta/classes-recipe/features_check.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta/classes-recipe/features_check.bbclass b/meta/classes-recipe/features_check.bbclass index 4e122ecaef..1e0eaa4eed 100644 --- a/meta/classes-recipe/features_check.bbclass +++ b/meta/classes-recipe/features_check.bbclass @@ -21,7 +21,7 @@ python () { unused = True - for kind in ['DISTRO', 'MACHINE', 'COMBINED', 'IMAGE']: + for kind in ['DISTRO', 'MACHINE', 'COMBINED', 'IMAGE', 'TUNE']: if d.getVar('ANY_OF_' + kind + '_FEATURES') is None and not d.hasOverrides('ANY_OF_' + kind + '_FEATURES') and \ d.getVar('REQUIRED_' + kind + '_FEATURES') is None and not d.hasOverrides('REQUIRED_' + kind + '_FEATURES') and \ d.getVar('CONFLICT_' + kind + '_FEATURES') is None and not d.hasOverrides('CONFLICT_' + kind + '_FEATURES'): From patchwork Wed Jul 2 21:44:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FE49C83F04 for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web10.8361.1751492667147071152 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2u015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 3/6] kernel.bbclass: State riscv required tune_features for Linux Date: Wed, 2 Jul 2025 16:44:21 -0500 Message-Id: <1751492664-12569-4-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219853 From: Mark Hatle Required: rv32ima_zicsr_zifencei rv64ima_zicsr_zifencei See the arch/riscv/Makefile: riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei Signed-off-by: Mark Hatle --- meta/classes-recipe/kernel.bbclass | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/meta/classes-recipe/kernel.bbclass b/meta/classes-recipe/kernel.bbclass index 2d9943c8a0..eb03424dfc 100644 --- a/meta/classes-recipe/kernel.bbclass +++ b/meta/classes-recipe/kernel.bbclass @@ -4,10 +4,14 @@ # SPDX-License-Identifier: MIT # -inherit linux-kernel-base kernel-module-split +inherit linux-kernel-base kernel-module-split features_check COMPATIBLE_HOST = ".*-linux" +# Linux has a minimum ISA requires on riscv, see arch/riscv/Makefile +REQUIRED_TUNE_FEATURES:riscv32 = "rv 32 i m a zicsr zifencei" +REQUIRED_TUNE_FEATURES:riscv64 = "rv 64 i m a zicsr zifencei" + KERNEL_PACKAGE_NAME ??= "kernel" KERNEL_DEPLOYSUBDIR ??= "${@ "" if (d.getVar("KERNEL_PACKAGE_NAME") == "kernel") else d.getVar("KERNEL_PACKAGE_NAME") }" From patchwork Wed Jul 2 21:44:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C1E4C83F0A for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web11.8316.1751492667206210060 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2v015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 4/6] linux-yocto/6.12: riscv: Enable dynamic ISA selection Date: Wed, 2 Jul 2025 16:44:22 -0500 Message-Id: <1751492664-12569-5-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219854 From: Mark Hatle The updated yocto-kernel-cache introduces risc-v ISA selection, move commit to allow these KERNEL_FEATURES to be selected. Changelog: arch/riscv/tunes: Implement RISC-V ISA selection amd-zynqmp: crypto: Kconfig: Obsolete DEV_XILINX_RSA config option bsp: add new bsp amd-zynq nxp-imx9: Enable NEUTRON for i.MX95-19x19-verdin kver: bumping to v6.12.33 preempt-rt.scc: enable firmware loading support for rt kernel intel-socfpga: enable intel-socfpga support for yocto-6.12 nxp-imx9: Enable enetc for nxp-imx95 nxp-imx9: Enable multimedia related configs for nxp-imx95 nxp-imx9: Enable devfreq governors fs/yaffs2: fix build warnings in yaffs_vfs.c when running make allyesconfig ti-am335x: add kernel-cache configuration for v6.12 kernel nvidia-orin: enable config to support EFI GUID Partition nvidia-orin: enable configs I2C GPIO expander tca9534 nvidia-orin: enable configs to support efivarfs feature bsp: add new bsp amd-zynqmp kver: bumping to v6.12.32 nxp-imx9: Enable PHY_FSL_IMX9_DPHY_RX for nxp-imx9 Signed-off-by: Mark Hatle --- meta/recipes-kernel/linux/linux-yocto-rt_6.12.bb | 2 +- meta/recipes-kernel/linux/linux-yocto-tiny_6.12.bb | 2 +- meta/recipes-kernel/linux/linux-yocto_6.12.bb | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/meta/recipes-kernel/linux/linux-yocto-rt_6.12.bb b/meta/recipes-kernel/linux/linux-yocto-rt_6.12.bb index 5a7bad9017..da0dea21fb 100644 --- a/meta/recipes-kernel/linux/linux-yocto-rt_6.12.bb +++ b/meta/recipes-kernel/linux/linux-yocto-rt_6.12.bb @@ -15,7 +15,7 @@ python () { } SRCREV_machine ?= "7cb6d42c40de351ecab0a083aef260f84407de0d" -SRCREV_meta ?= "60b8562e9989f268ad5d241989f56b71cfa1f648" +SRCREV_meta ?= "d32aa55c8954b11e8e29627e82df6180b2efc4fd" SRC_URI = "git://git.yoctoproject.org/linux-yocto.git;branch=${KBRANCH};name=machine;protocol=https \ git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.12;destsuffix=${KMETA};protocol=https" diff --git a/meta/recipes-kernel/linux/linux-yocto-tiny_6.12.bb b/meta/recipes-kernel/linux/linux-yocto-tiny_6.12.bb index 0fad73dddd..1e08082697 100644 --- a/meta/recipes-kernel/linux/linux-yocto-tiny_6.12.bb +++ b/meta/recipes-kernel/linux/linux-yocto-tiny_6.12.bb @@ -18,7 +18,7 @@ KMETA = "kernel-meta" KCONF_BSP_AUDIT_LEVEL = "2" SRCREV_machine ?= "298aefdf4112e7c0a84522e4acf2c722e433c8a0" -SRCREV_meta ?= "60b8562e9989f268ad5d241989f56b71cfa1f648" +SRCREV_meta ?= "d32aa55c8954b11e8e29627e82df6180b2efc4fd" PV = "${LINUX_VERSION}+git" diff --git a/meta/recipes-kernel/linux/linux-yocto_6.12.bb b/meta/recipes-kernel/linux/linux-yocto_6.12.bb index 262ae35704..5ad858df2a 100644 --- a/meta/recipes-kernel/linux/linux-yocto_6.12.bb +++ b/meta/recipes-kernel/linux/linux-yocto_6.12.bb @@ -29,7 +29,7 @@ SRCREV_machine:qemux86 ?= "298aefdf4112e7c0a84522e4acf2c722e433c8a0" SRCREV_machine:qemux86-64 ?= "298aefdf4112e7c0a84522e4acf2c722e433c8a0" SRCREV_machine:qemumips64 ?= "6470f58a8f04951f202cf85afb4421d2e7ec9995" SRCREV_machine ?= "298aefdf4112e7c0a84522e4acf2c722e433c8a0" -SRCREV_meta ?= "60b8562e9989f268ad5d241989f56b71cfa1f648" +SRCREV_meta ?= "d32aa55c8954b11e8e29627e82df6180b2efc4fd" # set your preferred provider of linux-yocto to 'linux-yocto-upstream', and you'll # get the /base branch, which is pure upstream -stable, and the same From patchwork Wed Jul 2 21:44:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B86FC83F0B for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web11.8318.1751492667376789178 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2w015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 5/6] linux-yocto/6.12: riscv: Enable TUNE_FEATURES based KERNEL_FEATURES Date: Wed, 2 Jul 2025 16:44:23 -0500 Message-Id: <1751492664-12569-6-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219856 From: Mark Hatle Allow the risc-v TUNE_FEATURES to select specific ISA (kconfig) selections in the kernel config via config fragments selected by KERNEL_FEATURES. This allows the following items to be selected dynamically: CONFIG_ARCH_RV32I CONFIG_ARCH_RV64I CONFIG_FPU CONFIG_RISCV_ISA_C CONFIG_RISCV_ISA_V CONFIG_RISCV_ISA_ZBB CONFIG_RISCV_ISA_ZICBOM CONFIG_RISCV_ISA_ZICBOZ CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI Note: Some ISA options, such as CONFIG_RISCV_ISA_C may be reenabled by other options such as CONFIG_EFI. This is properly reported by the configuration tooling. Signed-off-by: Mark Hatle --- meta/recipes-kernel/linux/linux-yocto.inc | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/meta/recipes-kernel/linux/linux-yocto.inc b/meta/recipes-kernel/linux/linux-yocto.inc index 389329030d..4d0a726bb6 100644 --- a/meta/recipes-kernel/linux/linux-yocto.inc +++ b/meta/recipes-kernel/linux/linux-yocto.inc @@ -37,6 +37,22 @@ KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'efi', 'cfg/ KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'numa', 'features/numa/numa.scc', '', d)}" KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'vfat', 'cfg/fs/vfat.scc', '', d)}" +KERNEL_FEATURES_RISCV = "\ + arch/riscv/tunes/riscv-isa-clear.scc \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'rv 32 i m a', 'arch/riscv/tunes/riscv-isa-rv32i.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'rv 64 i m a', 'arch/riscv/tunes/riscv-isa-rv64i.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'f d', 'arch/riscv/tunes/riscv-isa-fpu.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'c', 'arch/riscv/tunes/riscv-isa-c.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'v', 'arch/riscv/tunes/riscv-isa-v.scc', '', d)} \ + ${@bb.utils.contains_any('TUNE_FEATURES', 'b zba', 'arch/riscv/tunes/riscv-isa-zba.scc', '', d)} \ + ${@bb.utils.contains_any('TUNE_FEATURES', 'b zbb', 'arch/riscv/tunes/riscv-isa-zbb.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'zbc', 'arch/riscv/tunes/riscv-isa-zbc.scc', '', d)} \ + ${@bb.utils.contains( 'TUNE_FEATURES', 'zicbom', 'arch/riscv/tunes/riscv-isa-zicbom.scc', '', d)} \ + " + +KERNEL_FEATURES:append:riscv32 = " ${KERNEL_FEATURES_RISCV}" +KERNEL_FEATURES:append:riscv64 = " ${KERNEL_FEATURES_RISCV}" + # A KMACHINE is the mapping of a yocto $MACHINE to what is built # by the kernel. This is typically the branch that should be built, # and it can be specific to the machine or shared From patchwork Wed Jul 2 21:44:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hatle X-Patchwork-Id: 66150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70E70C8303C for ; Wed, 2 Jul 2025 21:44:31 +0000 (UTC) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by mx.groups.io with SMTP id smtpd.web11.8320.1751492667544702654 for ; Wed, 02 Jul 2025 14:44:27 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: kernel.crashing.org, ip: 63.228.1.57, mailfrom: mark.hatle@kernel.crashing.org) Received: from kernel.crashing.org.net (70-99-78-136.nuveramail.net [70.99.78.136] (may be forged)) by gate.crashing.org (8.18.1/8.18.1/Debian-2) with ESMTP id 562LiP2x015441 for ; Wed, 2 Jul 2025 16:44:26 -0500 From: Mark Hatle To: openembedded-core@lists.openembedded.org Subject: [PATCH v3 6/6] qemuriscv: Dynamically configure qemu CPU Date: Wed, 2 Jul 2025 16:44:24 -0500 Message-Id: <1751492664-12569-7-git-send-email-mark.hatle@kernel.crashing.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> References: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 02 Jul 2025 21:44:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/219859 From: Mark Hatle Use TUNE_FEATURES to dynamically configure the QEMU emulated CPU for the options selected by the DEFAULTTUNE. Note: OpenSBI currently requires 'c' (compressed instructions) or it will not work. Change the base device configuration to use a different variable to select the emulate devices. This will allow a user to override or append the QB_OPT_APPEND without the riscv32 override getting in the way. Signed-off-by: Mark Hatle --- meta/conf/machine/include/riscv/qemuriscv.inc | 31 +++++++++++++++++-- 1 file changed, 28 insertions(+), 3 deletions(-) diff --git a/meta/conf/machine/include/riscv/qemuriscv.inc b/meta/conf/machine/include/riscv/qemuriscv.inc index 65cbfd66ee..91a84cdd39 100644 --- a/meta/conf/machine/include/riscv/qemuriscv.inc +++ b/meta/conf/machine/include/riscv/qemuriscv.inc @@ -27,7 +27,6 @@ UBOOT_ENTRYPOINT:riscv64 = "0x80200000" # qemuboot options QB_SMP ?= "-smp 4" QB_KERNEL_CMDLINE_APPEND = "earlycon=sbi" -QB_CPU:riscv64 ?= "-cpu rva22s64" QB_MACHINE = "-machine virt" QB_DEFAULT_BIOS = "fw_jump.elf" QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no" @@ -36,5 +35,31 @@ QB_ROOTFS_OPT = "-drive id=disk0,file=@ROOTFS@,if=none,format=raw -device virtio QB_SERIAL_OPT = "-device virtio-serial-device -chardev null,id=virtcon -device virtconsole,chardev=virtcon" QB_TCPSERIAL_OPT = " -device virtio-serial-device -chardev socket,id=virtcon,port=@PORT@,host=127.0.0.1,nodelay=on -device virtconsole,chardev=virtcon" QB_GRAPHICS = "-device bochs-display" -QB_OPT_APPEND = "-device qemu-xhci -device usb-tablet -device usb-kbd" -QB_OPT_APPEND:riscv32 = "-device virtio-tablet-pci -device virtio-keyboard-pci" +QB_OPT_APPEND = "${RV_QEMU_ISA} ${RV_QEMU_DEVICES}" + +RV_QEMU_DEVICES = "-device qemu-xhci -device usb-tablet -device usb-kbd" +RV_QEMU_DEVICES:riscv32 = "-device virtio-tablet-pci -device virtio-keyboard-pci" + +RV_QEMU_ISA = "-cpu " +# Choose rv32 or rv64 +RV_QEMU_ISA .= "${@bb.utils.contains("TUNE_FEATURES", "rv 32", "rv32", "", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains("TUNE_FEATURES", "rv 64", "rv64", "", d)}" +# Disable all of the default extensions we don't support +RV_QEMU_ISA .= ",zihintntl=false,zihintpause=false,zawrs=false,zfa=false,svadu=false,zicntr=false,zihpm=false" +RV_QEMU_ISA .= ",zicboz=false,zicbop=false,zmmul=false,sstc=false,h=false" +# Dynamically enable the extensions based on TUNE_FEATURES +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "m", ",m=true", ",m=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "a", ",a=true", ",a=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains_any("TUNE_FEATURES", "f d", ",f=true", ",f=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "d", ",d=true", ",d=false", d)}" +# OpenSBI fails to boot without 'c' +#RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "c", ",c=true", ",c=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "v", ",v=true", ",v=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "zicbom", ",zicbom=true", ",zicbom=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains_any("TUNE_FEATURES", "zicsr f d", ",zicsr=true", ",zicsr=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "zifencei", ",zifencei=true", ",zifencei=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zba", ",zba=true", ",zba=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zbb", ",zbb=true", ",zbb=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains ("TUNE_FEATURES", "zbc", ",zbc=true", ",zbc=false", d)}" +RV_QEMU_ISA .= "${@bb.utils.contains_any("TUNE_FEATURES", "b zbs", ",zbs=true", ",zbs=false", d)}" +