From patchwork Sun Jun 1 13:55:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: auh@yoctoproject.org X-Patchwork-Id: 64019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 770DAC71130 for ; Sun, 1 Jun 2025 13:55:56 +0000 (UTC) Received: from a27-193.smtp-out.us-west-2.amazonses.com (a27-193.smtp-out.us-west-2.amazonses.com [54.240.27.193]) by mx.groups.io with SMTP id smtpd.web11.27797.1748786154830885377 for ; Sun, 01 Jun 2025 06:55:54 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@yoctoproject.org header.s=j46ser6a2yusdzubpv7m7ewqgesde2ie header.b=PKz2mLgP; dkim=pass header.i=@amazonses.com header.s=gdwg2y3kokkkj5a55z2ilkup5wp5hhxx header.b=tiqe4GRk; spf=pass (domain: us-west-2.amazonses.com, ip: 54.240.27.193, mailfrom: 010101972bc70abf-f91acafb-8385-41e7-9dcc-579bd4c4a5de-000000@us-west-2.amazonses.com) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=j46ser6a2yusdzubpv7m7ewqgesde2ie; d=yoctoproject.org; t=1748786154; h=Content-Type:MIME-Version:From:To:Cc:Subject:Message-Id:Date; bh=a5jmyMVxb6UsUhs3qlKwMoymBpSx5tiCdBpxV0FjzN4=; b=PKz2mLgPICngAH2ko+7APVZHyKk3H1K5RbFLKpjVxNnSUr/66Jt5oqma7jg2TyyV sDjE2kH6Ry/3WiTRFQ8KOtKmbag5D1Bg1LbpyvFOKNdSyJ1PkfepCKL1j9mKJW/9W6c 9m/E89XoOeWlT+AQCt0LcQjLfuGniu14kMTLhNm0= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=gdwg2y3kokkkj5a55z2ilkup5wp5hhxx; d=amazonses.com; t=1748786154; h=Content-Type:MIME-Version:From:To:Cc:Subject:Message-Id:Date:Feedback-ID; bh=a5jmyMVxb6UsUhs3qlKwMoymBpSx5tiCdBpxV0FjzN4=; b=tiqe4GRkTL6U55o+15mSXaW1+wgam/5p5KEVuy41wR0vwUBqhgTIyFTqMJtrU7I3 gKVieg4mKZwXPAnZBcNeE+t2Kle6BrWKxTLzoaY6hJlb0TrWLJTkiNrrAqT4RWyyr6g GKwqssChp3TKSaOOVFsoEvRUoDLFsxLStUohCJZ4= MIME-Version: 1.0 From: auh@yoctoproject.org To: Bruce Ashfield Cc: openembedded-core@lists.openembedded.org Subject: [AUH] libunwind: upgrading to 1.8.2 SUCCEEDED Message-ID: <010101972bc70abf-f91acafb-8385-41e7-9dcc-579bd4c4a5de-000000@us-west-2.amazonses.com> Date: Sun, 1 Jun 2025 13:55:54 +0000 Feedback-ID: ::1.us-west-2.9np3MYPs3fEaOBysGKSlUD4KtcmPijcmS9Az2Hwf7iQ=:AmazonSES X-SES-Outgoing: 2025.06.01-54.240.27.193 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Sun, 01 Jun 2025 13:55:56 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/217671 Hello, this email is a notification from the Auto Upgrade Helper that the automatic attempt to upgrade the recipe(s) *libunwind* to *1.8.2* has Succeeded. Next steps: - apply the patch: git am 0001-libunwind-upgrade-1.8.1-1.8.2.patch - check the changes to upstream patches and summarize them in the commit message, - compile an image that contains the package - perform some basic sanity tests - amend the patch and sign it off: git commit -s --reset-author --amend - send it to the appropriate mailing list Alternatively, if you believe the recipe should not be upgraded at this time, you can fill RECIPE_NO_UPDATE_REASON in respective recipe file so that automatic upgrades would no longer be attempted. Please review the attached files for further information and build/update failures. Any problem please file a bug at https://bugzilla.yoctoproject.org/enter_bug.cgi?product=Automated%20Update%20Handler Regards, The Upgrade Helper -- >8 -- From 7f6bb8833a9da753b4fd15a713624fe7ec39ecdc Mon Sep 17 00:00:00 2001 From: Upgrade Helper Date: Sun, 1 Jun 2025 13:46:07 +0000 Subject: [PATCH] libunwind: upgrade 1.8.1 -> 1.8.2 --- ...t-sve-signal-check-that-SVE-is-prese.patch | 9 +- ...bc-or-musl-register-names-as-appropr.patch | 11 +- ...compilation-of-unw_getcontext-on-ARM.patch | 27 --- ...ork-inline-aarch64-as-for-setcontext.patch | 163 ------------------ .../libunwind/0005-Handle-musl-on-PPC32.patch | 11 +- .../libunwind/libunwind/libatomic.patch | 6 +- .../libunwind/libunwind/malloc.patch | 10 +- .../libunwind/libunwind/mips-byte-order.patch | 9 +- ...{libunwind_1.8.1.bb => libunwind_1.8.2.bb} | 4 +- 9 files changed, 23 insertions(+), 227 deletions(-) delete mode 100644 meta/recipes-support/libunwind/libunwind/0003-Fixed-miscompilation-of-unw_getcontext-on-ARM.patch delete mode 100644 meta/recipes-support/libunwind/libunwind/0004-Rework-inline-aarch64-as-for-setcontext.patch rename meta/recipes-support/libunwind/{libunwind_1.8.1.bb => libunwind_1.8.2.bb} (90%) diff --git a/meta/recipes-support/libunwind/libunwind/0001-tests-Garm64-test-sve-signal-check-that-SVE-is-prese.patch b/meta/recipes-support/libunwind/libunwind/0001-tests-Garm64-test-sve-signal-check-that-SVE-is-prese.patch index f7af9a3fce..4329c08742 100644 --- a/meta/recipes-support/libunwind/libunwind/0001-tests-Garm64-test-sve-signal-check-that-SVE-is-prese.patch +++ b/meta/recipes-support/libunwind/libunwind/0001-tests-Garm64-test-sve-signal-check-that-SVE-is-prese.patch @@ -1,7 +1,7 @@ -From 2f03399911abdd549237fa2db64a4a8311fe67dc Mon Sep 17 00:00:00 2001 +From 968f92f4cac9aa642f96fe76b3a04b82cace2e9c Mon Sep 17 00:00:00 2001 From: Ross Burton Date: Mon, 15 Jan 2024 16:59:14 +0000 -Subject: [PATCH 1/4] tests/Garm64-test-sve-signal: check that SVE is present +Subject: [PATCH] tests/Garm64-test-sve-signal: check that SVE is present before running tests If the compiler supports -march=armv8-a+sve then those options are used @@ -25,7 +25,7 @@ Signed-off-by: Ross Burton 1 file changed, 19 insertions(+) diff --git a/tests/Garm64-test-sve-signal.c b/tests/Garm64-test-sve-signal.c -index 52cb9ac6..cf66b3f1 100644 +index 52cb9ac..cf66b3f 100644 --- a/tests/Garm64-test-sve-signal.c +++ b/tests/Garm64-test-sve-signal.c @@ -9,11 +9,16 @@ @@ -68,6 +68,3 @@ index 52cb9ac6..cf66b3f1 100644 signal(SIGUSR1, signal_handler); for (unsigned int i = 0; i < sizeof(z) / sizeof(z[0]); ++i) z[i] = rand(); --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind/0002-coredump-use-glibc-or-musl-register-names-as-appropr.patch b/meta/recipes-support/libunwind/libunwind/0002-coredump-use-glibc-or-musl-register-names-as-appropr.patch index f458bc3c6f..cd0094dde8 100644 --- a/meta/recipes-support/libunwind/libunwind/0002-coredump-use-glibc-or-musl-register-names-as-appropr.patch +++ b/meta/recipes-support/libunwind/libunwind/0002-coredump-use-glibc-or-musl-register-names-as-appropr.patch @@ -1,8 +1,8 @@ -From 2a5473a31c6b02e9c49d688691e848d6281ffd2e Mon Sep 17 00:00:00 2001 +From fb49e9eb79b821253cfd64337c7190eafa18874d Mon Sep 17 00:00:00 2001 From: Ross Burton Date: Tue, 16 Jan 2024 18:21:26 +0000 -Subject: [PATCH 2/4] coredump: use glibc or musl register names as appropriate - on MIPS +Subject: [PATCH] coredump: use glibc or musl register names as appropriate on + MIPS glibc has register macros of the form EF_REGx, but musl uses EF_Rx. @@ -17,7 +17,7 @@ Signed-off-by: Ross Burton 1 file changed, 39 insertions(+), 30 deletions(-) diff --git a/src/coredump/_UCD_access_reg_linux.c b/src/coredump/_UCD_access_reg_linux.c -index 302f7bdf..05100ed6 100644 +index 302f7bd..05100ed 100644 --- a/src/coredump/_UCD_access_reg_linux.c +++ b/src/coredump/_UCD_access_reg_linux.c @@ -100,38 +100,47 @@ _UCD_access_reg (unw_addr_space_t as UNUSED, @@ -98,6 +98,3 @@ index 302f7bdf..05100ed6 100644 [UNW_MIPS_PC] = EF_CP0_EPC, }; #elif defined(UNW_TARGET_S390X) --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind/0003-Fixed-miscompilation-of-unw_getcontext-on-ARM.patch b/meta/recipes-support/libunwind/libunwind/0003-Fixed-miscompilation-of-unw_getcontext-on-ARM.patch deleted file mode 100644 index 19bdd858f7..0000000000 --- a/meta/recipes-support/libunwind/libunwind/0003-Fixed-miscompilation-of-unw_getcontext-on-ARM.patch +++ /dev/null @@ -1,27 +0,0 @@ -From e5216c3fb1fa8d60a18c68e4749a3ff902f6678b Mon Sep 17 00:00:00 2001 -From: Ian Zborovsky -Date: Mon, 6 May 2024 02:01:19 +0300 -Subject: [PATCH 3/4] Fixed miscompilation of unw_getcontext() on ARM - -Upstream-Status: Backport -Signed-off-by: Ross Burton ---- - include/libunwind-arm.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/include/libunwind-arm.h b/include/libunwind-arm.h -index 6cfa577d..6643a185 100644 ---- a/include/libunwind-arm.h -+++ b/include/libunwind-arm.h -@@ -288,7 +288,7 @@ unw_tdep_context_t; - "mov r0, #0\n\t" \ - "stmia %[base]!, {r0-r15}\n\t" \ - VSTMIA \ -- : [r0] "=r" (r0) : [base] "r" (unw_base) : "memory"); \ -+ : [r0] "=r" (r0), [base] "+r" (unw_base) : : "memory"); \ - (int)r0; }) - #else /* __thumb__ */ - #define unw_tdep_getcontext(uc) ({ \ --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind/0004-Rework-inline-aarch64-as-for-setcontext.patch b/meta/recipes-support/libunwind/libunwind/0004-Rework-inline-aarch64-as-for-setcontext.patch deleted file mode 100644 index 005a077028..0000000000 --- a/meta/recipes-support/libunwind/libunwind/0004-Rework-inline-aarch64-as-for-setcontext.patch +++ /dev/null @@ -1,163 +0,0 @@ -From a832070f3665d29a8a06652c15f94d144c24ac69 Mon Sep 17 00:00:00 2001 -From: Stephen Webb -Date: Mon, 22 Apr 2024 15:56:54 -0400 -Subject: [PATCH 4/5] Rework inline aarch64 as for setcontext - -Modern GC and clang were barfing on the inline asm constraints for the -aarch64-linux setcontext() replacement. Reformulated the asm code to -reduce the required constraints. - -Upstream-Status: Backport -Signed-off-by: Ross Burton ---- - src/aarch64/Gos-linux.c | 115 +++++++++++++++++++++------------------- - 1 file changed, 61 insertions(+), 54 deletions(-) - -diff --git a/src/aarch64/Gos-linux.c b/src/aarch64/Gos-linux.c -index 7cd8c879..1e494962 100644 ---- a/src/aarch64/Gos-linux.c -+++ b/src/aarch64/Gos-linux.c -@@ -2,6 +2,7 @@ - Copyright (C) 2008 CodeSourcery - Copyright (C) 2011-2013 Linaro Limited - Copyright (C) 2012 Tommi Rantala -+ Copyright 2024 Stephen M. Webb - - This file is part of libunwind. - -@@ -28,6 +29,28 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ - - #ifndef UNW_REMOTE_ONLY - -+/* Magic constants generated from gen-offsets.c */ -+#define SC_R0_OFF "8" -+#define SC_R2_OFF "24" -+#define SC_R18_OFF "152" -+#define SC_R20_OFF "168" -+#define SC_R22_OFF "184" -+#define SC_R24_OFF "200" -+#define SC_R26_OFF "216" -+#define SC_R28_OFF "232" -+#define SC_R30_OFF "248" -+ -+#define FP_R08_OFF "80" -+#define FP_R09_OFF "88" -+#define FP_R10_OFF "96" -+#define FP_R11_OFF "104" -+#define FP_R12_OFF "112" -+#define FP_R13_OFF "120" -+#define FP_R14_OFF "128" -+#define FP_R15_OFF "136" -+ -+#define SC_SP_OFF "0x100" -+ - HIDDEN int - aarch64_local_resume (unw_addr_space_t as, unw_cursor_t *cursor, void *arg) - { -@@ -36,65 +59,49 @@ aarch64_local_resume (unw_addr_space_t as, unw_cursor_t *cursor, void *arg) - - if (c->sigcontext_format == AARCH64_SCF_NONE) - { -+ -+ /* -+ * This is effectively the old POSIX setcontext(). -+ * -+ * This inline asm is broken up to use local scratch registers for the -+ * uc_mcontext.regs and FPCTX base addresses because newer versions of GCC -+ * and clang barf on too many constraints (gh-702) when the C array -+ * elements are used directly. -+ * -+ * Clobbers aren't required for the inline asm because they just convince -+ * the compiler to save those registers and they never get restored -+ * becauise the asm ends with a plain ol' ret. -+ */ -+ register void* uc_mcontext __asm__ ("x5") = (void*) &uc->uc_mcontext; -+ register void* fpctx __asm__ ("x4") = (void*) GET_FPCTX(uc); -+ - /* Since there are no signals involved here we restore EH and non scratch - registers only. */ - __asm__ __volatile__ ( -- "ldr x0, %[x0]\n\t" -- "ldr x1, %[x1]\n\t" -- "ldr x2, %[x2]\n\t" -- "ldr x3, %[x3]\n\t" -- "ldr x19, %[x19]\n\t" -- "ldr x20, %[x20]\n\t" -- "ldr x21, %[x21]\n\t" -- "ldr x22, %[x22]\n\t" -- "ldr x23, %[x23]\n\t" -- "ldr x24, %[x24]\n\t" -- "ldr x25, %[x25]\n\t" -- "ldr x26, %[x26]\n\t" -- "ldr x27, %[x27]\n\t" -- "ldr x28, %[x28]\n\t" -- "ldr x29, %[x29]\n\t" -- "ldr x30, %[x30]\n\t" -- "ldr d8, %[d8]\n\t" -- "ldr d9, %[d9]\n\t" -- "ldr d10, %[d10]\n\t" -- "ldr d11, %[d11]\n\t" -- "ldr d12, %[d12]\n\t" -- "ldr d13, %[d13]\n\t" -- "ldr d14, %[d14]\n\t" -- "ldr d15, %[d15]\n\t" -- "ldr x5, %[sp]\n\t" -+ "ldp x0, x1, [x5, " SC_R0_OFF "]\n\t" -+ "ldp x2, x3, [x5, " SC_R2_OFF "]\n\t" -+ "ldp x18, x19, [x5, " SC_R18_OFF "]\n\t" -+ "ldp x20, x21, [x5, " SC_R20_OFF "]\n\t" -+ "ldp x22, x23, [x5, " SC_R22_OFF "]\n\t" -+ "ldp x24, x25, [x5, " SC_R24_OFF "]\n\t" -+ "ldp x26, x27, [x5, " SC_R26_OFF "]\n\t" -+ "ldp x28, x29, [x5, " SC_R28_OFF "]\n\t" -+ "ldr x30, [x5, " SC_R30_OFF "]\n\t" -+ "ldr d8, [x4, " FP_R08_OFF "]\n\t" -+ "ldr d9, [x4, " FP_R09_OFF "]\n\t" -+ "ldr d10, [x4, " FP_R10_OFF "]\n\t" -+ "ldr d11, [x4, " FP_R11_OFF "]\n\t" -+ "ldr d12, [x4, " FP_R12_OFF "]\n\t" -+ "ldr d13, [x4, " FP_R13_OFF "]\n\t" -+ "ldr d14, [x4, " FP_R14_OFF "]\n\t" -+ "ldr d15, [x4, " FP_R15_OFF "]\n\t" -+ "ldr x5, [x5, " SC_SP_OFF "]\n\t" - "mov sp, x5\n\t" - "ret\n" -- : -- : [x0] "m"(uc->uc_mcontext.regs[0]), -- [x1] "m"(uc->uc_mcontext.regs[1]), -- [x2] "m"(uc->uc_mcontext.regs[2]), -- [x3] "m"(uc->uc_mcontext.regs[3]), -- [x19] "m"(uc->uc_mcontext.regs[19]), -- [x20] "m"(uc->uc_mcontext.regs[20]), -- [x21] "m"(uc->uc_mcontext.regs[21]), -- [x22] "m"(uc->uc_mcontext.regs[22]), -- [x23] "m"(uc->uc_mcontext.regs[23]), -- [x24] "m"(uc->uc_mcontext.regs[24]), -- [x25] "m"(uc->uc_mcontext.regs[25]), -- [x26] "m"(uc->uc_mcontext.regs[26]), -- [x27] "m"(uc->uc_mcontext.regs[27]), -- [x28] "m"(uc->uc_mcontext.regs[28]), -- [x29] "m"(uc->uc_mcontext.regs[29]), /* FP */ -- [x30] "m"(uc->uc_mcontext.regs[30]), /* LR */ -- [d8] "m"(GET_FPCTX(uc)->vregs[8]), -- [d9] "m"(GET_FPCTX(uc)->vregs[9]), -- [d10] "m"(GET_FPCTX(uc)->vregs[10]), -- [d11] "m"(GET_FPCTX(uc)->vregs[11]), -- [d12] "m"(GET_FPCTX(uc)->vregs[12]), -- [d13] "m"(GET_FPCTX(uc)->vregs[13]), -- [d14] "m"(GET_FPCTX(uc)->vregs[14]), -- [d15] "m"(GET_FPCTX(uc)->vregs[15]), -- [sp] "m"(uc->uc_mcontext.sp) -- : "x0", "x1", "x2", "x3", "x19", "x20", "x21", "x22", "x23", "x24", -- "x25", "x26", "x27", "x28", "x29", "x30" -- ); -+ : -+ : [uc_mcontext] "r"(uc_mcontext), -+ [fpctx] "r"(fpctx) -+ ); - } - else - { --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind/0005-Handle-musl-on-PPC32.patch b/meta/recipes-support/libunwind/libunwind/0005-Handle-musl-on-PPC32.patch index 63d3c85de4..53c6ed6b4b 100644 --- a/meta/recipes-support/libunwind/libunwind/0005-Handle-musl-on-PPC32.patch +++ b/meta/recipes-support/libunwind/libunwind/0005-Handle-musl-on-PPC32.patch @@ -1,7 +1,7 @@ -From 7bd4fbdea43310e52feb57fb5afab6bec798cc99 Mon Sep 17 00:00:00 2001 +From 475156f6de81860fbefa52ce784f4d41f1b01558 Mon Sep 17 00:00:00 2001 From: Ross Burton Date: Wed, 17 Jan 2024 16:28:39 +0000 -Subject: [PATCH 5/5] Handle musl on PPC32 +Subject: [PATCH] Handle musl on PPC32 On Linux, glibc and musl disagree over the layout of the ucontext_t structure. For more details, see the musl mailing list: @@ -21,7 +21,7 @@ Signed-off-by: Ross Burton 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/ppc32/Ginit.c b/src/ppc32/Ginit.c -index 9444cbb8..5e94ed8a 100644 +index 9444cbb..88014cf 100644 --- a/src/ppc32/Ginit.c +++ b/src/ppc32/Ginit.c @@ -42,6 +42,13 @@ static struct unw_addr_space local_addr_space; @@ -66,7 +66,7 @@ index 9444cbb8..5e94ed8a 100644 addr = &uc->uc_mcontext.mc_gpr[gregs_idx]; #endif diff --git a/src/ppc32/ucontext_i.h b/src/ppc32/ucontext_i.h -index ee93c697..cfd8fe0e 100644 +index ee93c69..cfd8fe0 100644 --- a/src/ppc32/ucontext_i.h +++ b/src/ppc32/ucontext_i.h @@ -44,8 +44,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ @@ -83,6 +83,3 @@ index ee93c697..cfd8fe0e 100644 /* These are dummy structures used only for obtaining the offsets of the various structure members. */ --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind/libatomic.patch b/meta/recipes-support/libunwind/libunwind/libatomic.patch index f39e92f2ee..d4ceb05859 100644 --- a/meta/recipes-support/libunwind/libunwind/libatomic.patch +++ b/meta/recipes-support/libunwind/libunwind/libatomic.patch @@ -1,4 +1,4 @@ -From d6a0d8ce07c761e51b9dc7c5d16a9b06c3e93560 Mon Sep 17 00:00:00 2001 +From 9699f39556e9fb4d8077890ea3696489e9b840c6 Mon Sep 17 00:00:00 2001 From: Stephen Webb Date: Mon, 18 Mar 2024 10:22:26 -0400 Subject: [PATCH] configure.ac: detect if -latomic is required @@ -14,10 +14,10 @@ Signed-off-by: Ross Burton 1 file changed, 12 insertions(+) diff --git a/configure.ac b/configure.ac -index 758a27d19..d0ef5f3d9 100644 +index eaa0ddc..d5f1d4a 100644 --- a/configure.ac +++ b/configure.ac -@@ -94,6 +94,18 @@ dnl Checks for library functions. +@@ -93,6 +93,18 @@ dnl Checks for library functions. AC_CHECK_FUNCS(dl_iterate_phdr dl_phdr_removals_counter dlmodinfo getunwind \ ttrace mincore pipe2 sigaltstack execvpe) diff --git a/meta/recipes-support/libunwind/libunwind/malloc.patch b/meta/recipes-support/libunwind/libunwind/malloc.patch index 026a56f155..8d43364d51 100644 --- a/meta/recipes-support/libunwind/libunwind/malloc.patch +++ b/meta/recipes-support/libunwind/libunwind/malloc.patch @@ -1,4 +1,4 @@ -From b67d508a93bf1ba231c18dce3894cfee25c16e0d Mon Sep 17 00:00:00 2001 +From 1a5aa715f2de4deb3421101b26131c43cfb4b8fa Mon Sep 17 00:00:00 2001 From: Stephen Webb Date: Wed, 12 Feb 2025 12:08:07 -0500 Subject: [PATCH] Fix bad prototype for malloc() in test @@ -23,7 +23,7 @@ Signed-off-by: Ross Burton create mode 100644 tests/unw_test.h diff --git a/tests/Gtest-nomalloc.c b/tests/Gtest-nomalloc.c -index 5b97fc709..e770ff614 100644 +index 5b97fc7..e770ff6 100644 --- a/tests/Gtest-nomalloc.c +++ b/tests/Gtest-nomalloc.c @@ -1,78 +1,92 @@ @@ -188,10 +188,10 @@ index 5b97fc709..e770ff614 100644 + exit (UNW_TEST_EXIT_PASS); } diff --git a/tests/Makefile.am b/tests/Makefile.am -index adc34ac63..60f3f3adc 100644 +index e2b07bc..844105a 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am -@@ -214,7 +214,7 @@ endif +@@ -200,7 +200,7 @@ endif noinst_PROGRAMS = $(noinst_PROGRAMS_common) $(noinst_PROGRAMS_cdep) \ $(noinst_PROGRAMS_arch) @@ -202,7 +202,7 @@ index adc34ac63..60f3f3adc 100644 -e 's,[@]XFAIL_TESTS[@],$(XFAIL_TESTS),g' \ diff --git a/tests/unw_test.h b/tests/unw_test.h new file mode 100644 -index 000000000..9ae86dce1 +index 0000000..9ae86dc --- /dev/null +++ b/tests/unw_test.h @@ -0,0 +1,47 @@ diff --git a/meta/recipes-support/libunwind/libunwind/mips-byte-order.patch b/meta/recipes-support/libunwind/libunwind/mips-byte-order.patch index 3336b79055..cd9e106497 100644 --- a/meta/recipes-support/libunwind/libunwind/mips-byte-order.patch +++ b/meta/recipes-support/libunwind/libunwind/mips-byte-order.patch @@ -1,7 +1,7 @@ -From dbbf8110ed3fd2cbac20a8ec2ac769e13c67bab1 Mon Sep 17 00:00:00 2001 +From 6d347283393a010f87064b80a899236c61e92c0d Mon Sep 17 00:00:00 2001 From: Ross Burton Date: Tue, 16 Jan 2024 18:22:38 +0000 -Subject: [PATCH 2/2] byte order +Subject: [PATCH] byte order endian.h on musl/mips can't be included in __ASSEMBLER__ mode, so use the __BYTE_ORDER__ symbol instead. @@ -13,7 +13,7 @@ Signed-off-by: Ross Burton 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mips/getcontext.S b/src/mips/getcontext.S -index d1dbd579..de9b6818 100644 +index d1dbd57..de9b681 100644 --- a/src/mips/getcontext.S +++ b/src/mips/getcontext.S @@ -24,12 +24,11 @@ OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION @@ -30,6 +30,3 @@ index d1dbd579..de9b6818 100644 # define OFFSET 4 # else # define OFFSET 0 --- -2.34.1 - diff --git a/meta/recipes-support/libunwind/libunwind_1.8.1.bb b/meta/recipes-support/libunwind/libunwind_1.8.2.bb similarity index 90% rename from meta/recipes-support/libunwind/libunwind_1.8.1.bb rename to meta/recipes-support/libunwind/libunwind_1.8.2.bb index 10714ea247..6f7168b5df 100644 --- a/meta/recipes-support/libunwind/libunwind_1.8.1.bb +++ b/meta/recipes-support/libunwind/libunwind_1.8.2.bb @@ -10,14 +10,12 @@ SRC_URI = "${GITHUB_BASE_URI}/download/v${PV}/${BP}.tar.gz \ file://mips-byte-order.patch \ file://0001-tests-Garm64-test-sve-signal-check-that-SVE-is-prese.patch \ file://0002-coredump-use-glibc-or-musl-register-names-as-appropr.patch \ - file://0003-Fixed-miscompilation-of-unw_getcontext-on-ARM.patch \ - file://0004-Rework-inline-aarch64-as-for-setcontext.patch \ file://0005-Handle-musl-on-PPC32.patch \ file://libatomic.patch \ file://malloc.patch \ " -SRC_URI[sha256sum] = "ddf0e32dd5fafe5283198d37e4bf9decf7ba1770b6e7e006c33e6df79e6a6157" +SRC_URI[sha256sum] = "7f262f1a1224f437ede0f96a6932b582c8f5421ff207c04e3d9504dfa04c8b82" inherit autotools multilib_header github-releases