From patchwork Tue Feb 25 15:18:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57846 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9D52C021BF for ; Tue, 25 Feb 2025 15:18:22 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.10489.1740496698593653382 for ; Tue, 25 Feb 2025 07:18:18 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 77ADA1BCB for ; Tue, 25 Feb 2025 07:18:34 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1ABBC3F5A1 for ; Tue, 25 Feb 2025 07:18:18 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 1/7] arm/hafnium: update to v2.12.0 Date: Tue, 25 Feb 2025 10:18:11 -0500 Message-Id: <20250225151817.11875-1-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6385 Update to the latest version of halfnium Changes between 2bef7ab3895c48d39b84ab58179b2d0de5156b8b and 2cf2ca7c4b81ab18e9cd363d9a5c8288e2a94fda 2cf2ca7c4b81 docs: the change log for the v2.12 release 69e18eb52d63 docs: update the threat model for IPI threats c9866ab33c7a docs: add description of single service IPI support b17856caec30 test: interrupt targeting blocked vcpu is queued 0ee13d9cc510 test: add helpers to share page for coordination btw endpoints eda971da9f4c fix: queue interrupt targeting blocked vcpu 0a69718c6298 fix(docs): fixes to the docs to fix build errors 4b3d26803b56 test(ipi): IPI to invalid vCPU fails 2f579f93c1d9 test: multiple SPs periodic deadlines on multiple cores 8157b6897a8f test: multiple SPs with periodic deadline b390a0d12967 test(ipi): set target vCPU in VCPU_STATE_BLOCKED 2affbc7a7bbb test(ipi): target vCPU set in VCPU_STATE_PREEMPTED 180a65a7be5f feat(ipi): handle in VCPU_STATE_BLOCKED/PREEMPTED 84d49b67d2d9 fix(ipi): small fixes to the ipi implementation 0136b2bf3f35 test: migrate blocked vcpu with pending timer da42b544504b test: timer expired while vcpu is in PREEMPTED state 7c9702280c62 chore: reduce verbosity of console messages for SPs 9243e772b209 docs: support for arch timer in secure world c0110997e1f8 chore: add doc comment on Pauth fault tests a067dc1d77f8 test: add unit tests for timer management 872742eec217 test: use watchdog timer as source of non secure interrupt febcb625856e test: add driver for normal world watchdog timer b9dd51451e46 test: introduce driver for sp805 peripheral 65827d703535 test: migrate vCPU of SP with pending timer deadline 593b8addcbdc test: multiple SPs programmed with timer deadlines fe10878b1e1c test: SP reprograms the arch timer deadline b2429b49c524 test: SP handles timer with short deadline 34c050a04357 test: commands for SP services to configure timer 64ae5a8d6a18 test: add SP helper utilities for arch timer 6b8cf4f361f6 feat(arch timer): handle spurious host timer interrupt 106bfc364d64 feat(arch timer): migrate vCPU with pending timer to another CPU cf069a65988e feat(arch timer): resume SP if deadline expires in NWd 2efb3e103382 feat(arch timer): handle host timer interrupt tracking live deadline 32424db1d5d6 feat(arch timer): inject timer virtual interrupt before resuming vCPU a3787c91a96c feat(arch timer): track pending timer configured by SP vCPU 28e988f3bb56 chore: exclude physical timer source file from static checks f684d196422b feat(arch timer): trap and emulate physical timer access from SPs d3ac7383c10f feat(arch timer): helpers to configure EL1 physical timer f658f5e1a6e1 feat(arch timer): initialize timer list and host physical timer def48d0365b3 feat(arch timer): introduce host timer driver c31708afa85c feat(arch timer): helper utilities to add and remove from timer list eed861e514ba feat(arch timer): data structure to track pending timers 08200fe0f2e2 test: physical interrupt preempts virtual interrupt handling 75331b3ee028 test: SPMC call chain not preemptible 179f567f17fe test: helpers commands to mimic secure interrupt scenarios 94946a1451e3 fix(interrupts): SPMC scheduled call chain shall not be preempted 025a451a9275 fix: simplify secure interrupt handling c3fd9756a53e feat(memory share): handle GPF in FFA_MEM_FRAG_RX e06384d55458 docs: document VM availability messages 50ef91174b38 refactor: api_ffa_msg_send_direct_resp 13f09815b474 refactor: don't pass sender/receiver ID 79504ff11a86 refactor: remove unused functions a1a0235181b3 test: VM availability messaging tests 06e8b732abc2 feat: forward VM availability messages from SPMC to SP d0356f85a2a2 refactor: `spmd_handler` refactorings 520bcc86451b test: VM created/destroyed partition properties a603e0842531 feat: VM created/destroyed partition properties 18694027d10d feat: parse `vm-availability-messages` 1308a63f4851 test(ipi): FFA_NOTIFICATION_INFO_GET reports pending IPI d270b869c989 test(ipi): target waiting vCPU whilst in SWd 537165559733 test(ipi): target waiting vCPU whilst in NWd 3a9510e81960 test(ipi): handling SRI in the NWd 377defd58730 test(ipi): send IPI to running vCPU d2efb134495d test(ipi): state machine to help testing IPI 8be2651ff463 test(ipi): add unit tests for fetching pending IPIs 1f2babf02fd8 feat(ipi): report IPIs in FFA_NOTIFICATION_INFO_GET 960be20fecdc feat(ipi): handle IPI for waiting case f3cf28cf7d4b feat(ipi): introduce IPI paravirtualised interface 18485946304c refactor: use bitfields for interrupt_descriptor struct e44e18e5702b fix: increase stack size in primary VM cc9d11383413 ci: increase timeout for long running tests b8f9a899f0be test: if SPs wake up with eret FFA_RUN 4dbf4d95c63f fix: only normal world VMs need FFA_RUN 478faac95b69 refactor: always eret FFA_RUN to the caller 8ddb0e2d11e6 chore: drop the FFA_RUN tests 3190f5401e09 chore: specify updated submodule commit hash baaf9e5bd0c5 docs: update FFA_PARTITION_INFO_GET(_REGS) 0ffce75f8244 refactor(notifications): verbose validity check 3e55c4d8e3de fix: check ff-a version for functionality support d96c931b233d test(ff-a): report features in partition info get 7fb0fdb7ab97 fix: report indirect message and direct message 2 11f50e5ff10b chore: drop linux/driver project checks d5d6c381e69c chore: drop the driver/linux submodule 8018929656f3 doc: refer the checkpatch.pl setup d8e61447a1b5 ci: add script download checkpatch.pl 94b0fa111104 chore: drop rule to update linux binary ddeedafa09d0 chore: drop the third_party/linux submodule 6b756a10770a ci: drop the setup with the hafnium driver 15e302616540 chore: drop hf_interrupt_inject da6b099e5dfb chore: drop mailbox waiting list 9a9ed227a137 test(ff-a): FFA_MSG_WAIT called with pending message ccbf26c078c7 docs: add FFA_MSG_WAIT description ea8ccfe752cb refactor(notifications): drop the SRI state ac0cb263714c chore: drop legacy timer support in hypervisor 9acc62973951 chore: remove legacy timer support tests a74c97c4c184 test: interrupt targets blocked SP 23a7e58b6494 fix(interrupts): resume blocked vCPU and pend vIRQ line 3e749afb2d9b test(pauth): test PAuth usage from S-EL0 70c6ca0e0cb9 fix(pauth): use prng to generate S-EL0 pauth keys 9478e32bb811 refactor: UUID packing/unpacking cca64d765bf0 refactor: `get_ffa_partition_info` fb9c2a27a319 refactor: `api_ffa_fill_partition_info` 45abeebfd2b4 feat: report error if too many UUIDs in manifest 6053297ef775 refactor(manifest): UUID parsing 8c5de22b6b6a test: fork 'preempted_by_secure_interrupt' bd32c97bdb07 refactor: simplify interception of FF-A calls 67f5ba3d10d3 refactor: boot order list to use list.h 8e02186908e0 refactor: rename list functions 3bfc36eab652 test(ff-a): cannot send indirect message when RX buffer full 3d5a9609bf43 test(ff-a): add RX retention tests to S-EL0 setup a2103eb08381 feat(code-coverage): check elf files for folder include/exclude c7270b752e5f fix(memory share): hypervisor retrieve request check 7640451f68fc fix(build): fix out of tree build specifying $OUT 36fcf881497b fix: detect pauth algorithm in cpu 483686441714 refactor: `memcpy` refactors 5d5f27972dbb fix: use correct load-address while adding offset 3bb825946fed fix(indirect message): set framework notifications 8ccd2d0f0552 fix: rename load address relative offset node name 67196c7ad3bc docs: document new `FFA_VERSION` behaviour c4d9ae80b40b fix(ff-a): don't report ME interrupt to EL0 41c5da385103 fix(notifications): delay SRI flag use from NWd d9e7c8fd3cf9 fix: in case the mailbox is FULL return FFA_RUN 77b4eef0071d fix(hftest): clear NPI when polling for notifications 486ffdce7223 test(ff-a): FFA_MSG_WAIT multicore RX buffer test 337dbdfa04ee test(ff-a): test FFA_MSG_WAIT with retain RX buffer flag 7253bd5c43fc feat(ff-a): add retain RX buffer flag to ffa_msg_wait bc854180a4bb test(ff-a): verify FFA_MSG_WAIT releases RX buffer be1a0b7a4d43 fix(ffa): add RX buffer release to FFA_MSG_WAIT b8730e9f7263 refactor: moved api_interrupt_clear_decrement to vcpu cfc8174a3a22 refactor: added ffa_msg_wait_complete 472f66a344c9 refactor: use vm_id_is_current_world ac9407556eca refactor: rename implicit_completion_signal 3b31f09c4e80 refactor: create vcpu_secure_interrupt_complete 9a4b9c0b9592 fix(notifications): per-vCPU for MP only 318e90a733de feat: queue interrupt targeting blocked vcpu c023e39839c0 test: new setup with S-EL1 UP SP as Service2 538b688a0865 test: register secondary entrypoint only for MP S-EL1 ec3bf2223df0 test: queue interrupt targeting a migrated vcpu in blocked state 97fa216c6ae9 test: queue interrupt targeting a migrated vcpu in running state ce6baae61eee test: queue interrupt targeting a migrated vcpu in waiting state 4fff340ea012 test: queue multiple pending virtual interrupts e1bec84e69f1 test: handle secure interrupt triggered by Generic Timer 95bb8fe60145 test: leverage build define to identify an S-EL0 SP 75a1ab7b9c3c test: update manifests to accommodate AP REFCLK timer device region 76fe642c630f test: add SP helper commands to manage generic timer ad3fb6698931 test: add driver for AP REFCLK Generic timer 92b404ecffd6 test: driver for generic memory mapped system timer ae519e184f12 test: map MMIO regions from device region nodes 7945bb578a0f refactor: reduce fields tracking interrupt handling for vcpus 93d3d7015108 feat(interrupts): target migratable S-EL1 UP vCPU 42e56c11d90e feat(interrupts): target migratable S-EL0 UP vCPU 48dc41c3890c feat(interrupts): queue if unable to signal virtual interrupt c64d0645a4c4 feat(interrupts): prioritize servicing queued virtual interrupts 32913cb081cf feat(interrupts): data structures, helpers for queueing b7c2558e1bbd fix(interrupts): drop the running priority before resuming vcpu 6acc53703857 fix(hftest): logs from different setups would override ff651e335032 feat: hftest to disable_visualisation 6f6bf8a117f9 refactor: simplify functions to pend VI 33172403a44a fix: moved unsupported function log 3e9f605eba42 test: interrupt to be pended before boot cc542042dbbd feat(interrupts): physical interrupt enabled d533859d7826 chore: add venv to gitignore 1c56a252a966 fix(hftest): service set-up functions in core 0 65deaa433730 refactor: drop hypervisor-specific tests 6045881f4fe2 fix(notifications): vCPU ID check in get ABI a2c79226b56b docs: redirect to a common ff-a binding document in TF-A 296ee70c7af7 refactor(memory share): split check of hyp retrieve request 058ddee34d02 fix: remove memory region's device attribute 71704804400a secure_tc: enable branch protection 9c5b1d3708f8 refactor: split `api_ffa_features` 650cb148d610 refactor: report FFA_YIELD 1a8c0cdb812c refactor: report secondary EP register supported 5a222641c137 refactor: permission get/set supported at S-EL0 partitions 4271ff9734fe refactor: remove arch/platform specific ffa_features 4e8e479805bb refactor: reduce log level of some log statements be12343e0ceb fix(hftest): interrupt enable/disable 94f9a7303d06 fix(docs): refactor poetry dependency group 734981e83008 fix(memory share): dont change the PAS for device memory 9a444adfee0b refactor(hftest): update iris options fd374b8c9227 fix(memory share): v1.1 emad reserved field check 5ebf4bf2c364 feat: parallelize `clang-tidy` 2ad6b66ef5f6 chore: fix `clang-tidy` warnings a4d4a2b00cf2 fix: check `.h` files with `clang-tidy` 20acb0118db9 refactor: remove `make check` ca9234c8510c refactor: reformat `.clang-tidy` 67a7926ce341 fix: first vCPU runs in the VCPU_STATE_RUNNING 77f39c21e52a fix(docs): point poetry readthedocs virtual env bd43209c3d7f refactor: console log verbosity 052fa62be451 fix(docs): design doc typo fails the build a33eca997600 fix(qemu): memory barriers to operate DMA 66a38bd5184d fix: fix build with clang-18 a5ea909bfc61 fix: fix build with clang-17 74ee3ab8bb56 fix: fix build with clang-16 6f1f1210152d feat: print vCPU ID 920362870c0d test: tests for printing sequentially and concurrently 31e5c95fd1c7 fix(hftest): define stacks for all secondary cores 7cdb36d7dfa8 test(mem share): RO mem cannot be zeroed during send 72d53a15d7b7 fix(boot): remove limit all partition memory is RW c7a3848c7cc0 refactor: improve hftest error message 133ae6e2e48b feat(dlog): adopt FF-A in `stdout_putchar` c5cebbc0e8d0 refactor: move log buffer from VM to vCPU 99fe2434f9d9 refactor: add documentation for interrupt controller in DT 1c26ae7ec65a fix(gic): add support for passing GIC data from DT in boot flow 99c5eff25b84 test: add unit tests to validate dma properties 718afa9ca629 refactor: create a helper function to obtain common fields 9c764b3e5437 refactor: use dma device properties struct within device node 7de26958d155 refactor: extract VM's log buffer into separate struct 6027b4f0bd7a fix: fix signature of `memcpy` 8f046e4873ea refactor: remove `CHECK_OR_ZERO` macro from `std.h` 2b56fc163c19 refactor: replace some uses of `uintptr_t` with `cpu_id_t` b4ef4320e1d0 refactor: use typedef for CPU entry point functions 71d887b7cad0 refactor(memory share): improve naming of sender_orig_mode c8e6e85d7f72 test(memory share): device as normal through descritor mem types 3b65a25f2642 test(memory share): lend device memory as normal 6e2613628196 fix(memory share): add precedence check for memory type 2268412d6968 test(memory share): normal memory lent as device 91052c3eb749 fix(memory share): log for invalid instruction access 3f295b18c75c feat(manifest): add overlap checks for SPMC memory 889cbf1e6e82 refactor: use enums for PSCI constants 5e99699970bc refactor: add helper function to check if VM is primary 8204182ee3d2 refactor: add helper functions for checking if VM is UP/MP 0a824e972474 chore: fix log strings bd060340445e fix(memory share): relinquish from VM 9bbcb87d8873 fix(memory share): assert pointer before dereferencing a39a84497eda feat(memory share): relinquish use `memcpy_trapped` 3f6527cd56f9 feat(memory share): revert memory retrieve 69cdfd9531f8 feat(memory share): avoid updating PTs 7b9cc432ce38 feat(memory share): memcpy_trapped to copy retrieve resp 8f2150d1d4c6 feat(memory share): `memcpy_trapped` to read from tx f220d57a4102 fix(memory share): retrieve request validation c9227c849e62 fix(memory share): multiple borrower with NWd VM 540cddfcb118 feat: introduce gicd_set_ctrl helper utility cde596402559 test(ff-a): add tests for changing version through `FFA_VERSION` 64d930ee6c33 fix: check that calls to FFA_VERSION actually succeed e9921275a326 fix: memory sharing tests 08befddc43c0 refactor: move `update_mm_security_state` to `common/ffa.c` 2909e54cf230 refactor: port tests due to new restrictions d319fbbb5b9b fix: remove log statement that caused `FFA_VERSION` to fail 6eeec8e85a5f feat: restrict `FFA_VERSION` calls 0e617d9d2245 refactor(ff-a): `FFA_VERSION` related refactorings 4b846eb871c0 fix(mem share): zeroing RO memory during memory send 8fc1b5054cb2 fix: error codes need to be uint32_t 6fd6c1d6ecad fix: fix input validation in FFA_FEATURES 49ec1e42e218 refactor: refactor `api_ffa_features` 88851f90b88e feat: add macros to check bits d1c34b5edee1 feat(mte): add error log for sync tag fault in EL2 95fbb31760eb feat(memory share): add memory share 64-bit ABIs b9ae416a7d55 refactor: use `GET_ESR_EC` macro 5a13355b0802 refactor: add `GET_ESR_FNV` 9f7ce018c967 test(dlog): unit tests for `dlog` with binary format specifier 7efc8377234e feat(dlog): support binary unsigned integer format specifiers e8937d9c2a05 chore(dlog): fix uses of `dlog` to use new format strings 544549064bb2 feat(dlog): check arguments to `dlog` at compile-time 50af30574657 test(dlog): unit tests for `dlog` with length modifiers 70894da99ab1 feat(dlog): handle length modifiers e980e611ed8a refactor(dlog): miscellaneous changes related to logging 705b56e94b38 refactor(dlog): move `dlog_flush_buffer` to `api.c` e8fdaed4c376 refactor(dlog): replace macros with enums 93157d09e78f test(dlog): unit tests for `dlog` c9df08b45438 feat(hftest): assertion macros for strings d2ef618a680c refactor(dlog): return number of characters written 222d9fbb3dee fix: enable `-Wsign-compare` in `ASSERT_EQ` 1064a9c8d3c3 refactor: use `enum ffa_error` for errors 824b63d9b256 feat: enable `-Wsign-compare` b090762d1c4d fix: disable `-Wsign-compare` for dtc 4a88b9625897 feat: enable `-Wextra` flag df099becb672 refactor(init): use memory pool for boot params dc759f53ddbe refactor: use an enum for FF-A error codes d38270c14fe8 refactor: use enum for SP commands 6a7c95926233 feat(hftest): rewrite error messages for failed assertions 76766e61e230 refactor: use `typeof` in `HFTEST_ASSERT_OP` 871b41e33565 refactor: always expand `assert` macro 3a3e08dbd653 fix: check for illegal values of gic related build flags 346a09cfce7f fix: check for illegal branch protection feature 0549849def41 fix: propagate enable_mte build flag to cflags 00d3b632aeda fix: incorrect calculation for number of boot info desc b886d4930571 fix(memory share): drop check to instruction access Signed-off-by: Jon Mason --- .../0001-work-around-visibility-issue.patch | 29 ------------------- .../{hafnium_2.11.bb => hafnium_2.12.0.bb} | 3 +- 2 files changed, 1 insertion(+), 31 deletions(-) delete mode 100644 meta-arm/recipes-bsp/hafnium/hafnium/0001-work-around-visibility-issue.patch rename meta-arm/recipes-bsp/hafnium/{hafnium_2.11.bb => hafnium_2.12.0.bb} (94%) diff --git a/meta-arm/recipes-bsp/hafnium/hafnium/0001-work-around-visibility-issue.patch b/meta-arm/recipes-bsp/hafnium/hafnium/0001-work-around-visibility-issue.patch deleted file mode 100644 index dc0c35fe448f..000000000000 --- a/meta-arm/recipes-bsp/hafnium/hafnium/0001-work-around-visibility-issue.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 745294ffa9bb9296eb4250f24dd0ae8115fadd7a Mon Sep 17 00:00:00 2001 -From: Jon Mason -Date: Thu, 27 Oct 2022 20:10:09 +0000 -Subject: [PATCH] work around visibility issue - -gn commit 46b572ce4ceedfe57f4f84051bd7da624c98bf01 "fixed" the -visibility field not applying to public configs. This caused dtc to -have issues due to libfdt and others not being specified. Due to the -number, it was cleaner to remove the visibility field (which defaults to -everything being visible). - -Upstream-Status: Pending [Not submitted to upstream yet] -Signed-off-by: Jon Mason ---- - BUILD.gn | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/BUILD.gn b/BUILD.gn -index f55560c540de..d60c3e37135b 100644 ---- a/BUILD.gn -+++ b/BUILD.gn -@@ -5,7 +5,6 @@ - # https://opensource.org/licenses/BSD-3-Clause. - - config("libfdt_config") { -- visibility = [ ":gtest" ] - include_dirs = [ - "libfdt", - "hafnium_inc", diff --git a/meta-arm/recipes-bsp/hafnium/hafnium_2.11.bb b/meta-arm/recipes-bsp/hafnium/hafnium_2.12.0.bb similarity index 94% rename from meta-arm/recipes-bsp/hafnium/hafnium_2.11.bb rename to meta-arm/recipes-bsp/hafnium/hafnium_2.12.0.bb index 0fe9a79b032f..86034de6ab4a 100644 --- a/meta-arm/recipes-bsp/hafnium/hafnium_2.11.bb +++ b/meta-arm/recipes-bsp/hafnium/hafnium_2.12.0.bb @@ -16,9 +16,8 @@ inherit deploy python3native pkgconfig ${CLANGNATIVE} SRC_URI = "gitsm://git.trustedfirmware.org/hafnium/hafnium.git;protocol=https;branch=master \ file://0001-arm-hafnium-fix-kernel-tool-linking.patch \ file://0001-Use-pkg-config-native-to-find-the-libssl-headers.patch;patchdir=third_party/linux \ - file://0001-work-around-visibility-issue.patch;patchdir=third_party/dtc \ " -SRCREV = "2bef7ab3895c48d39b84ab58179b2d0de5156b8b" +SRCREV = "2cf2ca7c4b81ab18e9cd363d9a5c8288e2a94fda" S = "${WORKDIR}/git" B = "${WORKDIR}/build" From patchwork Tue Feb 25 15:18:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11665C19777 for ; Tue, 25 Feb 2025 15:18:23 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10381.1740496698838303408 for ; Tue, 25 Feb 2025 07:18:18 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ABA1D28C7 for ; Tue, 25 Feb 2025 07:18:34 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 46EA03F5A1 for ; Tue, 25 Feb 2025 07:18:18 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 2/7] arm/opencsd: update to 1.5.5 Date: Tue, 25 Feb 2025 10:18:12 -0500 Message-Id: <20250225151817.11875-2-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:23 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6386 Update to the latest stable version (1.5.5), comprised of the following commits: 742d60ed7dc7 opencsd: Update version info and README for 1.5.5 7ca491c516b8 build: Update docs for MacOS support cac83e59666e build: Add MacOS development makefile e56eff270ca2 build: Use .dylib shared library suffix for MacOS 35f957d2a97a build: Create initial MacOS makefile 44dff5b22a26 build: Restore Linux build support a0e13010e1d6 build: Rename build folders as 'unix_common' for upcoming MacOS support ecdde9f69307 tests: Add option to suppress elapsed processing time in test program. 821632be920c tests: update mem_buff_demo test to add options. 70e472c9387f opencsd: Memacc object cleanup fix Signed-off-by: Jon Mason --- .../opencsd/{opencsd_1.5.4.bb => opencsd_1.5.5.bb} | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) rename meta-arm/recipes-devtools/opencsd/{opencsd_1.5.4.bb => opencsd_1.5.5.bb} (95%) diff --git a/meta-arm/recipes-devtools/opencsd/opencsd_1.5.4.bb b/meta-arm/recipes-devtools/opencsd/opencsd_1.5.5.bb similarity index 95% rename from meta-arm/recipes-devtools/opencsd/opencsd_1.5.4.bb rename to meta-arm/recipes-devtools/opencsd/opencsd_1.5.5.bb index b07f5c7fee9c..a2ca8c62cf95 100644 --- a/meta-arm/recipes-devtools/opencsd/opencsd_1.5.4.bb +++ b/meta-arm/recipes-devtools/opencsd/opencsd_1.5.5.bb @@ -4,7 +4,7 @@ LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://LICENSE;md5=ad8cb685eb324d2fa2530b985a43f3e5" SRC_URI = "git://github.com/Linaro/OpenCSD;protocol=https;branch=master" -SRCREV = "7323ae88d16be4f9972b0ad60198963c64d70070" +SRCREV = "742d60ed7dc762d8d2e7f07037fac0eb17654e2f" S = "${WORKDIR}/git" From patchwork Tue Feb 25 15:18:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D38A6C021BB for ; Tue, 25 Feb 2025 15:18:22 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10382.1740496699008660403 for ; Tue, 25 Feb 2025 07:18:19 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D7CB22923 for ; Tue, 25 Feb 2025 07:18:34 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7C75D3F5A1 for ; Tue, 25 Feb 2025 07:18:18 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 3/7] arm/gn: update to latest commit Date: Tue, 25 Feb 2025 10:18:13 -0500 Message-Id: <20250225151817.11875-3-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6387 Update to the latest gn commit. Changes in gn between 95b0f8fe31a992a33c040bbe3867901335c12762 and ab638bd7cbb9ac8468bf2fbe60c74ed4706a14a7 ab638bd7cbb9 Revert "Speed-up GN with custom OutputStream interface." 2dd9331a7041 Speed-up GN with custom OutputStream interface. ed1abc107815 Add `exec_script_allowlist` to replace `exec_script_whitelist`. c97a86a72105 Retry ReplaceFile in case of failure 7296b601ea80 Fix crash when NinjaBuildWriter::RunAndWriteFile fails 468c6128db7f fix include for escape.h 5a47a93b9426 fix exit code for gn gen failure 24e92acb8472 misc: Use html.escape instead of cgi.escape feafd1012a32 Do not copy parent build_dependency_files_ in Scope constructors. Signed-off-by: Jon Mason --- meta-arm/recipes-devtools/gn/gn_git.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-arm/recipes-devtools/gn/gn_git.bb b/meta-arm/recipes-devtools/gn/gn_git.bb index 053cbdd1efcb..cc25b73f77e6 100644 --- a/meta-arm/recipes-devtools/gn/gn_git.bb +++ b/meta-arm/recipes-devtools/gn/gn_git.bb @@ -7,7 +7,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=0fca02217a5d49a14dfe2d11837bb34d" UPSTREAM_CHECK_COMMITS = "1" SRC_URI = "git://gn.googlesource.com/gn;protocol=https;branch=main" -SRCREV = "95b0f8fe31a992a33c040bbe3867901335c12762" +SRCREV = "ab638bd7cbb9ac8468bf2fbe60c74ed4706a14a7" PV = "0+git" S = "${WORKDIR}/git" From patchwork Tue Feb 25 15:18:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E55DFC021BC for ; Tue, 25 Feb 2025 15:18:22 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10384.1740496699352537481 for ; Tue, 25 Feb 2025 07:18:19 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 187C31BCB for ; Tue, 25 Feb 2025 07:18:35 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AFE4B3F5A1 for ; Tue, 25 Feb 2025 07:18:18 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 4/7] arm/trusted-firmware-a: update the LTS to v2.10.12 Date: Tue, 25 Feb 2025 10:18:14 -0500 Message-Id: <20250225151817.11875-4-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6389 Update trusted-firmware-a to lts-v2.10.12 Changes between 7e63213601425c7a6d83e47dc936b264deb9df2b and 408ba4ddfe9a8d55e3e2488bea89c39adef07981 408ba4ddfe9a docs(changelog): changelog for lts-v2.10.12 release 7bdf51628eab Merge "docs(maintainers): update LTS maintainers" into lts-v2.10 8355ef7728ec docs(maintainers): update LTS maintainers faceedf4e5c2 Merge changes from topic "for-lts-v2.10.12" into lts-v2.10 9007a3344e12 Merge changes from topic "gr/lts-doc-2.10" into lts-v2.10 924c7f42ce4a chore(deps): bump cross-spawn 7c8c034e5fed chore(deps): bump jinja2 in the pip group across 1 directory 3d85a19f2f54 docs: updates to LTS 13657a3f3f2a docs: add inital lts doc a4c57c122407 Merge changes from topic "lts-v2.10.12" into lts-v2.10 564922601397 feat(mbedtls): mbedtls config update for v3.6.2 44161dcb10ab docs(prerequisites): update mbedtls to version 3.6.2 0ac65e7aa5ec refactor(mbedtls): rename default mbedtls confs 8b2c885739dd fix(arm): add extra hash config to validate ROTPK 832b92b7f615 docs(changelog): changelog for lts-v2.10.11 release a3fc7c18c461 Merge changes from topic "for-lts-2.10.11" into lts-v2.10 196984e65da0 fix(cpus): workaround for Cortex-X4 erratum 2923985 0eed05ee70aa chore(cpus): optimise runtime errata applications 34e6d7cb8ce1 Merge changes from topic "sm/fix_erratum" into lts-v2.10 ad9dfdc5800c fix(cpus): workaround for CVE-2024-5660 for Cortex-X2 5673d345aaa3 fix(cpus): workaround for CVE-2024-5660 for Cortex-A77 4fd2a6702dd1 fix(cpus): workaround for CVE-2024-5660 for Neoverse-V1 a02a863d3156 fix(cpus): workaround for CVE-2024-5660 for Cortex-A78_AE 87250d2bb1ea fix(cpus): workaround for CVE-2024-5660 for Cortex-A78C 30c57c58abe3 fix(cpus): workaround for CVE-2024-5660 for Cortex-A78 c7d3c9eb2d81 fix(cpus): workaround for CVE-2024-5660 for Cortex-X1 282e63544d26 fix(cpus): workaround for CVE-2024-5660 for Neoverse-N2 f7ae819f03ae fix(cpus): workaround for CVE-2024-5660 for Cortex-A710 3efc9e13011d fix(cpus): workaround for CVE-2024-5660 for Neoverse-V2 17e17ed3f1e6 fix(cpus): workaround for CVE-2024-5660 for Cortex-X3 a6375e1feb42 fix(cpus): workaround for CVE-2024-5660 for Neoverse-V3 e42abf298321 fix(cpus): workaround for CVE-2024-5660 for Cortex-X4 698e68fe1fe9 fix(cpus): workaround for CVE-2024-5660 for Cortex-X925 b229b47bd86c chore: rename Blackhawk to Cortex-X925 96498991d1ce chore: rename Chaberton to Cortex-A725 b28aa38e28cf docs(changelog): changelog for lts-v2.10.10 release 8e74814ce52f Merge changes from topic "for-lts-v2.10.10" into lts-v2.10 c9f3fb5822dc build(deps): bump setuptools in the pip group across 1 directory 395ef3534cf1 chore(deps): bump micromatch 6c6e986bffb3 build(npm): update Node.js and all packages c5d2a030a35f build(deps): bump braces ebf6430a01c5 build(deps): bump idna from 3.4 to 3.7 93ad43e79ef7 build(deps): bump jinja2 from 3.1.2 to 3.1.4 f8a06a0f82ce build(deps): bump urllib3 from 2.0.2 to 2.2.2 3ea256c36a4b build(deps): bump pip from 23.1.2 to 23.3 Signed-off-by: Jon Mason --- ...firmware-a_2.10.9.bb => trusted-firmware-a_2.10.12.bb} | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) rename meta-arm/recipes-bsp/trusted-firmware-a/{trusted-firmware-a_2.10.9.bb => trusted-firmware-a_2.10.12.bb} (82%) diff --git a/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.9.bb b/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.12.bb similarity index 82% rename from meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.9.bb rename to meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.12.bb index febdcb4bace7..5454e84cc8aa 100644 --- a/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.9.bb +++ b/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.12.bb @@ -1,15 +1,15 @@ require recipes-bsp/trusted-firmware-a/trusted-firmware-a.inc -# TF-A v2.10.9 -SRCREV_tfa = "7e63213601425c7a6d83e47dc936b264deb9df2b" +# TF-A v2.10.12 +SRCREV_tfa = "408ba4ddfe9a8d55e3e2488bea89c39adef07981" SRCBRANCH = "lts-v2.10" LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" # in TF-A src, docs/getting_started/prerequisites.rst lists the expected version mbedtls -# mbedtls-3.6.1 +# mbedtls-3.6.2 SRC_URI_MBEDTLS = "git://github.com/ARMmbed/mbedtls.git;name=mbedtls;protocol=https;destsuffix=git/mbedtls;branch=mbedtls-3.6" -SRCREV_mbedtls = "71c569d44bf3a8bd53d874c81ee8ac644dd6e9e3" +SRCREV_mbedtls = "107ea89daaefb9867ea9121002fbbdf926780e98" LIC_FILES_CHKSUM_MBEDTLS = "file://mbedtls/LICENSE;md5=379d5819937a6c2f1ef1630d341e026d" From patchwork Tue Feb 25 15:18:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57845 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFA33C021B2 for ; Tue, 25 Feb 2025 15:18:22 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10383.1740496699278427671 for ; Tue, 25 Feb 2025 07:18:19 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 47CE528C7 for ; Tue, 25 Feb 2025 07:18:35 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DDCEE3F5A1 for ; Tue, 25 Feb 2025 07:18:18 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 5/7] arm/trusted-firmware-m: update to v2.1.1 Date: Tue, 25 Feb 2025 10:18:15 -0500 Message-Id: <20250225151817.11875-5-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6388 Update trusted-firmware-m to the latest LTS (TF-Mv2.1.1) Changes between 0c4c99ba33b3e66deea070e149279278dc7647f4 and 02bf279913439a07082dd581df033f370a8fbb92 02bf27991343 docs: Release notes for v2.1.1 7264a32e84a0 docs: rp2350: Minor docs & script improvements 4bad159af017 Docs: Release dates update a5e02ec0c6a2 Align .gitignore contents to main branch 8fe944a652f5 Platform: RP2350: Fix NV counters in ITS 66bc1fa8eed9 Build: Fix patch formatting for 0001-iar-Add-missing-v8.1m-check.patch 895d44a4eb52 Platform: RP2350: Add NV counters to ITS e81b741aa6cc tf-m-tests: Step version for rp2350 psa-arch-tests 2be65a027c86 Platform: rp2350: Add rwx linker flag conditionally for GNUARM a85425417696 Platform: RP2350: Add RP2350 porting 9ed2e7c7f52b Platform/TFM/ITS/Config: Commits required for new platform porting f12db7c872d5 cc3xx/low-level/pka: SRAM size depends on CC3XX version c7e0192fab6f cc3xx/low-level/hash: wait for hash engine to be idle 42a4041bdff4 Crypto: Update to Mbed TLS 3.6.2 471c127e7755 Crypto: Add option to enforce ABI compatibility 7da71fd05445 tfm_spe_mailbox: Fix NULL pointer checks 974bc101e0b2 cc3xx/low-level/pka: wait for sw reset to be done before proceeding 89b9c4889c60 Crypto: Enforce MBEDTLS_PSA_ASSUME_EXCLUSIVE_BUFFERS on Mbed TLS config 62b1300557c5 Crypto: Additional checks for writes to avoid out-of-bound access a2cead6a9ef4 tfm_spe_mailbox: Use local vars for local_copy_vects 15afe61d1194 TFMV-8: Fix unchecked user-supplied pointer via mailbox message 22e8e89c8f56 tfm_spe_mailbox: Do not write-back on input vectors checks failure 12a4c5342965 tfm_spe_mailbox: Validate vectors from NSPE 75bbe3fc0240 CC3XX: Relax assert condition in aead_crypt for input 0db7ebf32ba3 Crypto: Protect writes to avoid out-of-bound access 2ecea430fbb4 Crypto: Prevent the scratch allocator from overflowing fbcdc69b794d SPM: mailbox_agent_api: Free connection if params association fails 2a59580b5809 Crypto: Update to Mbed TLS 3.6.1 6a54ec89f22f Platform: STM32: script all_stm_platfrom 66596b4dae57 Platform: corstone1000: Fix isolation L2 memory protection 7045675209ca stm : fix error on b_u585i_iot02a with TF-Mv2.1.0 Signed-off-by: Jon Mason --- ...0-Fix-isolation-L2-memory-protection.patch | 88 ------------------- .../trusted-firmware-m-corstone1000.inc | 1 - ...c.inc => trusted-firmware-m-2.1.1-src.inc} | 24 ++--- ...rusted-firmware-m-scripts-native_2.1.1.bb} | 0 ...m_2.1.0.bb => trusted-firmware-m_2.1.1.bb} | 0 5 files changed, 12 insertions(+), 101 deletions(-) delete mode 100644 meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch rename meta-arm/recipes-bsp/trusted-firmware-m/{trusted-firmware-m-2.1.0-src.inc => trusted-firmware-m-2.1.1-src.inc} (84%) rename meta-arm/recipes-bsp/trusted-firmware-m/{trusted-firmware-m-scripts-native_2.1.0.bb => trusted-firmware-m-scripts-native_2.1.1.bb} (100%) rename meta-arm/recipes-bsp/trusted-firmware-m/{trusted-firmware-m_2.1.0.bb => trusted-firmware-m_2.1.1.bb} (100%) diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch deleted file mode 100644 index 267254c4c604..000000000000 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 4d3ebb03b89b122af490824ca73287954a35bd07 Mon Sep 17 00:00:00 2001 -From: Jamie Fox -Date: Thu, 22 Aug 2024 16:54:45 +0100 -Subject: [PATCH] Platform: corstone1000: Fix isolation L2 memory protection - -The whole of the SRAM was configured unprivileged on this platform, so -the memory protection required for isolation level 2 was not present. - -This patch changes the S_DATA_START to S_DATA_LIMIT MPU region to be -configured for privileged access only. It also reorders the MPU regions -so that the App RoT sub-region overlapping S_DATA has a higher region -number and so takes priority in the operation of the Armv6-M MPU. - -Signed-off-by: Jamie Fox -Upstream-Status: Submitted [https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/30951] ---- - .../arm/corstone1000/tfm_hal_isolation.c | 43 +++++++++---------- - 1 file changed, 21 insertions(+), 22 deletions(-) - -diff --git a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c -index 39b19c535..498f14ed2 100644 ---- a/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c -+++ b/platform/ext/target/arm/corstone1000/tfm_hal_isolation.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2020-2023, Arm Limited. All rights reserved. -+ * Copyright (c) 2020-2024, Arm Limited. All rights reserved. - * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon - * company) or an affiliate of Cypress Semiconductor Corporation. All rights - * reserved. -@@ -99,6 +99,26 @@ enum tfm_hal_status_t tfm_hal_set_up_static_boundaries( - return ret; - } - -+ /* Set the RAM attributes. It is needed because the first region overlaps the whole -+ * SRAM and it has to be overridden. -+ * The RAM_MPU_REGION_BLOCK_1_SIZE and RAM_MPU_REGION_BLOCK_2_SIZE are calculated manually -+ * and added to the platform_region_defs compile definitions. -+ */ -+ base = S_DATA_START; -+ limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE; -+ ret = configure_mpu(rnr++, base, limit, -+ XN_EXEC_NOT_OK, AP_RW_PRIV_ONLY); -+ if (ret != TFM_HAL_SUCCESS) { -+ return ret; -+ } -+ -+ base = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE; -+ limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE + RAM_MPU_REGION_BLOCK_2_SIZE; -+ ret = configure_mpu(rnr++, base, limit, -+ XN_EXEC_NOT_OK, AP_RW_PRIV_ONLY); -+ if (ret != TFM_HAL_SUCCESS) { -+ return ret; -+ } - - /* RW, ZI and stack as one region */ - base = (uint32_t)®ION_NAME(Image$$, TFM_APP_RW_STACK_START, $$Base); -@@ -133,27 +153,6 @@ enum tfm_hal_status_t tfm_hal_set_up_static_boundaries( - - #endif - -- /* Set the RAM attributes. It is needed because the first region overlaps the whole -- * SRAM and it has to be overridden. -- * The RAM_MPU_REGION_BLOCK_1_SIZE and RAM_MPU_REGION_BLOCK_2_SIZE are calculated manually -- * and added to the platform_region_defs compile definitions. -- */ -- base = S_DATA_START; -- limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE; -- ret = configure_mpu(rnr++, base, limit, -- XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV); -- if (ret != TFM_HAL_SUCCESS) { -- return ret; -- } -- -- base = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE; -- limit = S_DATA_START + RAM_MPU_REGION_BLOCK_1_SIZE + RAM_MPU_REGION_BLOCK_2_SIZE; -- ret = configure_mpu(rnr++, base, limit, -- XN_EXEC_NOT_OK, AP_RW_PRIV_UNPRIV); -- if (ret != TFM_HAL_SUCCESS) { -- return ret; -- } -- - arm_mpu_enable(); - - #endif /* CONFIG_TFM_ENABLE_MEMORY_PROTECT */ --- -2.25.1 - diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc index 9c38d1ad5dfe..c79ac2e3d896 100644 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc @@ -35,7 +35,6 @@ SRC_URI:append:corstone1000 = " \ file://0013-CC312-ADAC-Add-PSA_WANT_ALG_SHA_256-definition.patch \ file://0014-Platform-CS1000-Add-crypto-configs-for-ADAC.patch \ file://0015-Platform-CS1000-Fix-platform-name-in-logs.patch \ - file://0016-Platform-corstone1000-Fix-isolation-L2-memory-protection.patch \ file://0017-Platform-CS1000-Remove-unused-BL1-files.patch \ file://0018-Platform-CS1000-Remove-duplicated-metadata-write.patch \ file://0019-Platform-CS1000-Fix-compiler-switch-in-BL1.patch \ diff --git a/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.0-src.inc b/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.1-src.inc similarity index 84% rename from meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.0-src.inc rename to meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.1-src.inc index fb4ddcb673e3..6b483995f82d 100644 --- a/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.0-src.inc +++ b/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-2.1.1-src.inc @@ -27,28 +27,28 @@ SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_M};branch=${SRCBRANCH_tfm};name=tfm;dests " # The required dependencies are documented in tf-m/config/config_base.cmake -# TF-Mv2.1.0 +# TF-Mv2.1.1 SRCBRANCH_tfm ?= "release/2.1.x" -SRCREV_tfm = "0c4c99ba33b3e66deea070e149279278dc7647f4" -# TF-Mv2.1.0 +SRCREV_tfm = "02bf279913439a07082dd581df033f370a8fbb92" +# TF-Mv2.1.1 SRCBRANCH_tfm-extras ?= "release/2.1.x" SRCREV_tfm-extras = "95add8abb15879f48f1069a0952dd9abdffbc1f8" -# TF-Mv2.1.0 +# TF-Mv2.1.1 SRCBRANCH_tfm-tests ?= "release/2.1.x" -SRCREV_tfm-tests = "73100d90d8871435eaffa668eb04ce5b746ecece" -# CMSIS v6.0.0+ (intermediate SHA) +SRCREV_tfm-tests = "6f642014a8c255e163ae0bc4d21e327de694d6a2" +# CMSIS v6.0.0+ (intermediate SHA), CMSIS_TAG from lib/ext/cmsis/CMakeLists.txt SRCBRANCH_cmsis ?= "main" SRCREV_cmsis = "d0c460c1697d210b49a4b90998195831c0cd325c" -# mbedtls-3.6.0 -SRCBRANCH_mbedtls ?= "master" -SRCREV_mbedtls = "2ca6c285a0dd3f33982dd57299012dacab1ff206" -# mcuboot v2.1.0 +# mbedtls-3.6.2, value from MBEDCRYPTO_VERSION +SRCBRANCH_mbedtls ?= "mbedtls-3.6" +SRCREV_mbedtls = "107ea89daaefb9867ea9121002fbbdf926780e98" +# mcuboot v2.1.0, value from MCUBOOT_VERSION SRCBRANCH_mcuboot ?= "main" SRCREV_mcuboot = "9c99326b9756dbcc35b524636d99ed5f3e6cb29b" -# QCBOR v1.2 +# QCBOR v1.2, value from QCBOR_VERSION in lib/ext/qcbor/CMakeLists.txt SRCBRANCH_qcbor ?= "master" SRCREV_qcbor = "b0e7033268e88c9f27146fa9a1415ef4c19ebaff" -# PSA-ADAC (intermediate SHA, default value for PLATFORM_PSA_ADAC_VERSION in TF-M) +# PSA-ADAC (intermediate SHA), value from PLATFORM_PSA_ADAC_VERSION SRCBRANCH_tfm-psa-adac = "master" SRCREV_tfm-psa-adac = "5f5490cebe66ae997f316f83c3fbf1f97deef625" diff --git a/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-scripts-native_2.1.0.bb b/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-scripts-native_2.1.1.bb similarity index 100% rename from meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-scripts-native_2.1.0.bb rename to meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m-scripts-native_2.1.1.bb diff --git a/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_2.1.0.bb b/meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_2.1.1.bb similarity index 100% rename from meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_2.1.0.bb rename to meta-arm/recipes-bsp/trusted-firmware-m/trusted-firmware-m_2.1.1.bb From patchwork Tue Feb 25 15:18:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57847 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE360C18E7C for ; Tue, 25 Feb 2025 15:18:22 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.10490.1740496699460739787 for ; Tue, 25 Feb 2025 07:18:19 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73B122923 for ; Tue, 25 Feb 2025 07:18:35 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 18BC53F5A1 for ; Tue, 25 Feb 2025 07:18:19 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 6/7] arm/trusted-firmware-rmm: update to 0.6.0 Date: Tue, 25 Feb 2025 10:18:16 -0500 Message-Id: <20250225151817.11875-6-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6390 Signed-off-by: Jon Mason --- ...-firmware-rmm_0.5.0.bb => trusted-firmware-rmm_0.6.0.bb} | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) rename meta-arm/recipes-bsp/trusted-firmware-rmm/{trusted-firmware-rmm_0.5.0.bb => trusted-firmware-rmm_0.6.0.bb} (93%) diff --git a/meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.5.0.bb b/meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.6.0.bb similarity index 93% rename from meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.5.0.bb rename to meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.6.0.bb index b65b9eb2a766..d69b4e249ff6 100644 --- a/meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.5.0.bb +++ b/meta-arm/recipes-bsp/trusted-firmware-rmm/trusted-firmware-rmm_0.6.0.bb @@ -2,10 +2,8 @@ SUMMARY = "RMM Firmware" DESCRIPTION = "RMM Firmware for Arm reference platforms" LICENSE = "BSD-3-Clause & MIT" -SRC_URI = "gitsm://git.trustedfirmware.org/TF-RMM/tf-rmm.git;protocol=https;branch=main \ - " - -SRCREV = "6184a730bd4bc80d59eeff7f0752f8423500202c" +SRC_URI = "gitsm://git.trustedfirmware.org/TF-RMM/tf-rmm.git;protocol=https;branch=main" +SRCREV = "7f6bc132caef3596fbb88d3a419c2a3cb499cde2" UPSTREAM_CHECK_GITTAGREGEX = "^tf-rmm-v(?P\d+(\.\d+)+)$" LIC_FILES_CHKSUM += "file://docs/about/license.rst;md5=1375c7c641558198ffe401c2a799d79b" From patchwork Tue Feb 25 15:18:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 57848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 010DCC19778 for ; Tue, 25 Feb 2025 15:18:23 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10385.1740496699751198105 for ; Tue, 25 Feb 2025 07:18:19 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A084A292B for ; Tue, 25 Feb 2025 07:18:35 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 450563F5A1 for ; Tue, 25 Feb 2025 07:18:19 -0800 (PST) From: Jon Mason To: meta-arm@lists.yoctoproject.org Subject: [PATCH 7/7] arm/boot-wrapper-aarch64: update to the latest Date: Tue, 25 Feb 2025 10:18:17 -0500 Message-Id: <20250225151817.11875-7-jon.mason@arm.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20250225151817.11875-1-jon.mason@arm.com> References: <20250225151817.11875-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 25 Feb 2025 15:18:22 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/6391 Update to the latest commit. Changes in gn between 5e3760073454c72f3458805a1b7a89ecf80353cb and ac6742520ded1da30d500f74e8affe86e27cabd5 ac6742520ded aarch64: Start Xen on Armv8-R at EL2 ba899d1d7227 aarch64: Implement PSCI for Armv8-R 476a0b6451d7 aarch64: Enable Armv8-R EL2 boot 0f00cf4cb8b2 Introduce --with-bw-arch for boot-wrapper compile arch aafb5958eb9d Boot CPUs sequentially d62de19c8661 Add printing functions 1ab497ed6c38 Simplify spin logic 1e576e54d0a4 Unify assembly setup paths 19ffbec99cf5 aarch32: Always enter kernel via exception return e8e6f797bafa aarch32: Implement cpu_init_arch() 8745a2cd8e0a aarch32: Refactor inital entry 77c3316737fc aarch64: Always enter kernel via exception return 308d25f908a8 aarch64: Implement cpu_init_arch() 4dcb17f55300 aarch64: Remove redundant EL1 entry logic 400f0a86dcc8 Revert "configure: allow the use of bare-metal toolchains" 1fea854771f9 configure: allow the use of bare-metal toolchains 784feb9b0753 Makefile: suppress RWX segment warnings e1d7651f3c2f Makefile: rework test-dtc-option cd7fe8a88e82 aarch64: Enable access into RCW[S]MASK_EL1 registers from EL2 and below 1ac203146003 aarch64: Enable access into 128 bit system registers from EL2 and below b13b3bdcb2a1 aarch64: Enable access into SCTLR2_ELx registers from EL2 and below 61b84b4a1c02 aarch64: Remove TSCXT bit set from SCTLR_EL2_RESET 3bac221638c4 configure: make --with-kernel-dir optional Signed-off-by: Jon Mason --- .../boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb b/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb index d0f7893d8cc8..8a37dd9e9492 100644 --- a/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb +++ b/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb @@ -4,7 +4,7 @@ LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=bb63326febfb5fb909226c8e7ebcef5c" SRC_URI = "git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git;branch=master;protocol=https" -SRCREV = "5e3760073454c72f3458805a1b7a89ecf80353cb" +SRCREV = "ac6742520ded1da30d500f74e8affe86e27cabd5" # boot-wrapper doesn't make releases UPSTREAM_CHECK_COMMITS = "1"