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Thu, 11 Jul 2024 16:42:05 -0700 (PDT) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9d80:4380::c49a]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b4397ece4sm6447116b3a.144.2024.07.11.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jul 2024 16:42:05 -0700 (PDT) From: Khem Raj To: openembedded-core@lists.openembedded.org Cc: Khem Raj Subject: [PATCH 1/2] mesa: Add packageconfig knob to control tegra gallium driver Date: Thu, 11 Jul 2024 16:42:02 -0700 Message-ID: <20240711234203.3841594-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 11 Jul 2024 23:42:07 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/201795 Signed-off-by: Khem Raj --- meta/recipes-graphics/mesa/mesa.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/meta/recipes-graphics/mesa/mesa.inc b/meta/recipes-graphics/mesa/mesa.inc index d56def29163..c426e8fddd4 100644 --- a/meta/recipes-graphics/mesa/mesa.inc +++ b/meta/recipes-graphics/mesa/mesa.inc @@ -199,6 +199,9 @@ GALLIUMDRIVERS:append ="${@bb.utils.contains('PACKAGECONFIG', 'lima', ',lima', ' PACKAGECONFIG[panfrost] = "" GALLIUMDRIVERS:append ="${@bb.utils.contains('PACKAGECONFIG', 'panfrost', ',panfrost', '', d)}" +PACKAGECONFIG[tegra] = "" +GALLIUMDRIVERS:append ="${@bb.utils.contains('PACKAGECONFIG', 'tegra', ',tegra,nouveau', '', d)}" + PACKAGECONFIG[vulkan-beta] = "-Dvulkan-beta=true,-Dvulkan-beta=false" PACKAGECONFIG[osmesa] = "-Dosmesa=true,-Dosmesa=false" From patchwork Thu Jul 11 23:42:03 2024 Content-Type: text/plain; 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Thu, 11 Jul 2024 16:42:06 -0700 (PDT) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9d80:4380::c49a]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b4397ece4sm6447116b3a.144.2024.07.11.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jul 2024 16:42:06 -0700 (PDT) From: Khem Raj To: openembedded-core@lists.openembedded.org Cc: Khem Raj Subject: [PATCH 2/2] arch-arm64: Use neoverse-v1 ISA for Qemu usermode Date: Thu, 11 Jul 2024 16:42:03 -0700 Message-ID: <20240711234203.3841594-2-raj.khem@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240711234203.3841594-1-raj.khem@gmail.com> References: <20240711234203.3841594-1-raj.khem@gmail.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 11 Jul 2024 23:42:17 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/201796 With latest qemu several places where qemu-usermode is used e.g. nodejs, qtwebengine, chromium, the builds are failing form armv8a tuned machines (e.g. tegra) which is due to qemu crash ( SIGILL ) encoutered when 'max' ISA is used ( which is default ), max seems to use neoverse-n2 equivalent features, which is evident that SIGILL also happens when using -cpu neoverse-v2, therefore explicitly select neoverse-v1 for ISA, which works and covers almost all (if not all) cpu tunes for armv8 we have. Signed-off-by: Khem Raj --- meta/conf/machine/include/arm/arch-arm64.inc | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/meta/conf/machine/include/arm/arch-arm64.inc b/meta/conf/machine/include/arm/arch-arm64.inc index 832d0000acb..9639911d33b 100644 --- a/meta/conf/machine/include/arm/arch-arm64.inc +++ b/meta/conf/machine/include/arm/arch-arm64.inc @@ -42,3 +42,8 @@ TARGET_FPU = "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', '${TARGET_FPU_64} # support these they're meaningless NOP instructions, so there's very little # reason not to. TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '', d)}" + +# Fix qemu-user crashes while building nodejs/chromium/qtwebengine, defaults ISA is max and it generate SIGILLs +# qemu: uncaught target signal 4 (Illegal instruction) - core dumped +# Select the superset ISA +QEMU_EXTRAOPTIONS_armv8a = "-cpu neoverse-v1"