From patchwork Fri Jul 5 16:06:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bence.balogh@arm.com X-Patchwork-Id: 46060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB803C38150 for ; Fri, 5 Jul 2024 16:06:48 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.20411.1720195599368924170 for ; Fri, 05 Jul 2024 09:06:39 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: bence.balogh@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 17C3F367; Fri, 5 Jul 2024 09:07:04 -0700 (PDT) Received: from e126523.arm.com (unknown [10.57.75.169]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9BFBC3F766; Fri, 5 Jul 2024 09:06:37 -0700 (PDT) From: bence.balogh@arm.com To: meta-arm@lists.yoctoproject.org Cc: Bence Balogh Subject: [PATCH 1/3] arm-bsp/trusted-firmware-a: Upgrade Corstone1000 to TF-A v2.11 Date: Fri, 5 Jul 2024 18:06:20 +0200 Message-Id: <20240705160622.583987-2-bence.balogh@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240705160622.583987-1-bence.balogh@arm.com> References: <20240705160622.583987-1-bence.balogh@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 05 Jul 2024 16:06:48 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/5865 From: Bence Balogh Update the preferred version of TrustedFirmware-A for Cortsone-1000 from 2.10.x to 2.11.x to benefit from the latest fixes and improvements as well as to reduce the number of out-of-tree patches. As a result of updating the version: * Remove no longer required out-of-tree patches * Update the numbering of the remaining out-of-tree patches Additionally remove unnecessary white spaces in modified BitBake files. Signed-off-by: Bence Balogh --- .../conf/machine/include/corstone1000.inc | 2 +- ...-remove-unused-NS_SHARED_RAM-region.patch} | 0 ...md-remove-EL3-interrupt-registration.patch | 54 ------------------- ...clean-the-cache-and-disable-interru.patch} | 0 ...-Add-multicore-support-for-FVP-plat.patch} | 33 ++++++------ ...ne1000-include-platform-header-file.patch} | 0 .../trusted-firmware-a-corstone1000.inc | 17 +++--- 7 files changed, 25 insertions(+), 81 deletions(-) rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/{0004-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch => 0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch} (100%) delete mode 100644 meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-spmd-remove-EL3-interrupt-registration.patch rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/{0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch => 0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch} (100%) rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/{0006-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch => 0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch} (89%) rename meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/{0007-feat-corstone1000-include-platform-header-file.patch => 0006-feat-corstone1000-include-platform-header-file.patch} (100%) diff --git a/meta-arm-bsp/conf/machine/include/corstone1000.inc b/meta-arm-bsp/conf/machine/include/corstone1000.inc index c78cc061..b540610e 100644 --- a/meta-arm-bsp/conf/machine/include/corstone1000.inc +++ b/meta-arm-bsp/conf/machine/include/corstone1000.inc @@ -7,7 +7,7 @@ PREFERRED_VERSION_trusted-firmware-m ?= "2.0.%" # TF-A TFA_PLATFORM = "corstone1000" -PREFERRED_VERSION_trusted-firmware-a ?= "2.10.%" +PREFERRED_VERSION_trusted-firmware-a ?= "2.11.%" PREFERRED_VERSION_tf-a-tests ?= "2.10.%" TFA_BL2_BINARY = "bl2-corstone1000.bin" diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch similarity index 100% rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-spmd-remove-EL3-interrupt-registration.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-spmd-remove-EL3-interrupt-registration.patch deleted file mode 100644 index ea7a2913..00000000 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0003-fix-spmd-remove-EL3-interrupt-registration.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 684b8f88238f522b52eb102485762e02e6b1671a Mon Sep 17 00:00:00 2001 -From: Emekcan Aras -Date: Fri, 23 Feb 2024 13:17:59 +0000 -Subject: [PATCH] fix(spmd): remove EL3 interrupt registration - -This configuration should not be done for corstone1000 and similar -platforms. GICv2 systems only support EL3 interrupts and can have SEL1 component -as SPMC. - -Signed-off-by: Emekcan Aras -Upstream-Status: Inappropriate [Discussions of fixing this in a better way is ongoing in upstream] ---- - services/std_svc/spmd/spmd_main.c | 24 ------------------------ - 1 file changed, 24 deletions(-) - -diff --git a/services/std_svc/spmd/spmd_main.c b/services/std_svc/spmd/spmd_main.c -index 066571e9b..313f05bf3 100644 ---- a/services/std_svc/spmd/spmd_main.c -+++ b/services/std_svc/spmd/spmd_main.c -@@ -580,30 +580,6 @@ static int spmd_spmc_init(void *pm_addr) - panic(); - } - -- /* -- * Permit configurations where the SPM resides at S-EL1/2 and upon a -- * Group0 interrupt triggering while the normal world runs, the -- * interrupt is routed either through the EHF or directly to the SPMD: -- * -- * EL3_EXCEPTION_HANDLING=0: the Group0 interrupt is routed to the SPMD -- * for handling by spmd_group0_interrupt_handler_nwd. -- * -- * EL3_EXCEPTION_HANDLING=1: the Group0 interrupt is routed to the EHF. -- * -- */ --#if (EL3_EXCEPTION_HANDLING == 0) -- /* -- * Register an interrupt handler routing Group0 interrupts to SPMD -- * while the NWd is running. -- */ -- rc = register_interrupt_type_handler(INTR_TYPE_EL3, -- spmd_group0_interrupt_handler_nwd, -- flags); -- if (rc != 0) { -- panic(); -- } --#endif -- - return 0; - } - --- -2.25.1 - - diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch similarity index 100% rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch similarity index 89% rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch index 34630442..2a385d83 100644 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch @@ -1,4 +1,4 @@ -From bd975fbcff8886b3d3ed3268d7b6fa41bd7fba2d Mon Sep 17 00:00:00 2001 +From dcc9cf5111c41edc691f007bd97548d96f5efddb Mon Sep 17 00:00:00 2001 From: Harsimran Singh Tungal Date: Thu, 9 May 2024 16:59:34 +0000 Subject: [PATCH] feat(corstone1000): add multicore support for fvp @@ -13,8 +13,8 @@ Signed-off-by: Harsimran Singh Tungal .../common/corstone1000_helpers.S | 26 +++++++++++ .../corstone1000/common/corstone1000_pm.c | 43 ++++++++++++++++++- .../common/include/platform_def.h | 15 ++++++- - plat/arm/board/corstone1000/platform.mk | 8 ++++ - 4 files changed, 90 insertions(+), 2 deletions(-) + plat/arm/board/corstone1000/platform.mk | 7 +++ + 4 files changed, 89 insertions(+), 2 deletions(-) diff --git a/plat/arm/board/corstone1000/common/corstone1000_helpers.S b/plat/arm/board/corstone1000/common/corstone1000_helpers.S index cbe27c3b5..90dc4fee6 100644 @@ -56,10 +56,10 @@ index cbe27c3b5..90dc4fee6 100644 /* --------------------------------------------------------------------- diff --git a/plat/arm/board/corstone1000/common/corstone1000_pm.c b/plat/arm/board/corstone1000/common/corstone1000_pm.c -index 4b0a791e7..9cd384e18 100644 +index a52e945bf..979243317 100644 --- a/plat/arm/board/corstone1000/common/corstone1000_pm.c +++ b/plat/arm/board/corstone1000/common/corstone1000_pm.c -@@ -24,10 +24,51 @@ static void __dead2 corstone1000_system_reset(void) +@@ -33,10 +33,51 @@ static void __dead2 corstone1000_system_reset(void) wfi(); } } @@ -80,7 +80,7 @@ index 4b0a791e7..9cd384e18 100644 +{ + int core_index = plat_core_pos_by_mpidr(mpidr); + uint64_t *secondary_core_hold_base = (uint64_t *)CORSTONE1000_SECONDARY_CORE_HOLD_BASE; -+ + + /* Validate the core index */ + if ((core_index < 0) || (core_index > PLATFORM_CORE_COUNT)) { + return PSCI_E_INVALID_PARAMS; @@ -91,7 +91,7 @@ index 4b0a791e7..9cd384e18 100644 + + return PSCI_E_SUCCESS; +} - ++ +void corstone1000_pwr_domain_on_finish(const psci_power_state_t *target_state) +{ + (void)target_state; @@ -113,10 +113,10 @@ index 4b0a791e7..9cd384e18 100644 const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops) diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h -index 35bb6ad5c..56e124f96 100644 +index b9a1d43df..c4839ccf3 100644 --- a/plat/arm/board/corstone1000/common/include/platform_def.h +++ b/plat/arm/board/corstone1000/common/include/platform_def.h -@@ -251,7 +251,20 @@ +@@ -249,7 +249,20 @@ */ #define ARM_LOCAL_STATE_OFF U(2) @@ -139,11 +139,11 @@ index 35bb6ad5c..56e124f96 100644 #define PLAT_ARM_NS_IMAGE_BASE (BL33_BASE) diff --git a/plat/arm/board/corstone1000/platform.mk b/plat/arm/board/corstone1000/platform.mk -index dcd0df844..71b7f324c 100644 +index fd08803e8..45092ace9 100644 --- a/plat/arm/board/corstone1000/platform.mk +++ b/plat/arm/board/corstone1000/platform.mk -@@ -31,6 +31,14 @@ override NEED_BL31 := yes - NEED_BL32 := yes +@@ -31,6 +31,13 @@ override NEED_BL31 := yes + NEED_BL32 ?= yes override NEED_BL33 := yes +ENABLE_MULTICORE := 0 @@ -153,10 +153,9 @@ index dcd0df844..71b7f324c 100644 +endif +endif + -+ - # Include GICv2 driver files - include drivers/arm/gic/v2/gicv2.mk - + # Add CORSTONE1000_WITH_BL32 as a preprocessor define (-D option) + ifeq (${NEED_BL32},yes) + $(eval $(call add_define,CORSTONE1000_WITH_BL32)) -- -2.34.1 +2.25.1 diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0007-feat-corstone1000-include-platform-header-file.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-include-platform-header-file.patch similarity index 100% rename from meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0007-feat-corstone1000-include-platform-header-file.patch rename to meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0006-feat-corstone1000-include-platform-header-file.patch diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc index 3e7be142..f6677f70 100644 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc @@ -6,11 +6,10 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:" SRC_URI:append = " \ file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \ file://0002-fix-corstone1000-pass-spsr-value-explicitly.patch \ - file://0003-fix-spmd-remove-EL3-interrupt-registration.patch \ - file://0004-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch \ - file://0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch \ - file://0006-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch \ - file://0007-feat-corstone1000-include-platform-header-file.patch \ + file://0003-fix-corstone1000-remove-unused-NS_SHARED_RAM-region.patch \ + file://0004-fix-corstone1000-clean-the-cache-and-disable-interru.patch \ + file://0005-feat-corstone1000-Add-multicore-support-for-FVP-plat.patch \ + file://0006-feat-corstone1000-include-platform-header-file.patch \ " TFA_DEBUG = "1" @@ -27,13 +26,13 @@ TFA_SPMD_SPM_AT_SEL2 = "0" # BL2 loads BL32 (optee). So, optee needs to be built first: DEPENDS += "optee-os" -# Note: Regarding the build option: LOG_LEVEL. +# Note: Regarding the build option: LOG_LEVEL. # There seems to be an issue when setting it -# to 50 (LOG_LEVEL_VERBOSE), where the kernel +# to 50 (LOG_LEVEL_VERBOSE), where the kernel # tee driver sends yielding requests to OP-TEE # at a faster pace than OP-TEE processes them, -# as the processing time is consumed by logging -# in TF-A. When this issue occurs, booting halts +# as the processing time is consumed by logging +# in TF-A. When this issue occurs, booting halts # as soon as optee driver starts initialization. # Therefore, it's not currently recommended to # set LOG_LEVEL to 50 at all. From patchwork Fri Jul 5 16:06:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: bence.balogh@arm.com X-Patchwork-Id: 46059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA054C3271E for ; Fri, 5 Jul 2024 16:06:48 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.20719.1720195601982810901 for ; Fri, 05 Jul 2024 09:06:42 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: bence.balogh@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B97F7367; Fri, 5 Jul 2024 09:07:06 -0700 (PDT) Received: from e126523.arm.com (unknown [10.57.75.169]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F08943F766; Fri, 5 Jul 2024 09:06:40 -0700 (PDT) From: bence.balogh@arm.com To: meta-arm@lists.yoctoproject.org Cc: Emekcan Aras Subject: [PATCH 2/3] arm-bsp/trusted-firmware-m: corstone1000: Switch to metadata v2 Date: Fri, 5 Jul 2024 18:06:21 +0200 Message-Id: <20240705160622.583987-3-bence.balogh@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240705160622.583987-1-bence.balogh@arm.com> References: <20240705160622.583987-1-bence.balogh@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 05 Jul 2024 16:06:48 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/5866 From: Emekcan Aras Upgrades metadata structs in secure-enclave from v1 to v2 as described in psa-fwu spec: https://developer.arm.com/documentation/den0118/latest/ The TrustedFirmware-A v2.11 release supports only the metadata v2. The structs in TF-M side had to be aligned to keep the compatibility. Signed-off-by: Emekcan Aras --- ...m-Corstone1000-switch-to-metadata-v2.patch | 235 ++++++++++++++++++ .../trusted-firmware-m-corstone1000.inc | 1 + 2 files changed, 236 insertions(+) create mode 100644 meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0014-Platform-Corstone1000-switch-to-metadata-v2.patch diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0014-Platform-Corstone1000-switch-to-metadata-v2.patch b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0014-Platform-Corstone1000-switch-to-metadata-v2.patch new file mode 100644 index 00000000..527428bf --- /dev/null +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0014-Platform-Corstone1000-switch-to-metadata-v2.patch @@ -0,0 +1,235 @@ +From 748e0b4acbd9e1dce3450beffe2d54565df9ee8d Mon Sep 17 00:00:00 2001 +From: Emekcan Aras +Date: Mon, 8 Apr 2024 16:04:45 +0100 +Subject: [PATCH] Plaform: Corstone1000: Switch to metadata v2 + +This upgrades metadata data structs from v1 to v2 as described in psa +fwu spec: https://developer.arm.com/documentation/den0118/latest/ + +The TrustedFirmware-A v2.11 release supports only the metadata v2. The +structs in TF-M side had to be aligned to keep the compatibility. + +Signed-off-by: Emekcan Aras +Signed-off-by: Bence Balogh +Upstream-Status: Pending [Not submitted to upstream yet] +--- + .../corstone1000/fw_update_agent/fwu_agent.c | 94 ++++++++++++++----- + 1 file changed, 72 insertions(+), 22 deletions(-) + +diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c +index be04e0e5df..9f942cb23a 100644 +--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c ++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c +@@ -26,6 +26,13 @@ + #include "platform.h" + #endif + ++#define FWU_METADATA_VERSION 2 ++#define FWU_FW_STORE_DESC_OFFSET 0x20 ++#define NR_OF_MAX_FW_BANKS 4 ++ ++/*Metadata version 2 data structures defined by PSA_FW update specification; ++ *https://developer.arm.com/documentation/den0118/latest/ */ ++ + /* Properties of image in a bank */ + struct fwu_image_properties { + +@@ -58,6 +65,28 @@ struct fwu_image_entry { + + } __packed; + ++struct fwu_fw_store_descriptor { ++ ++ /* Number of Banks */ ++ uint8_t num_banks; ++ ++ /* Reserved */ ++ uint8_t reserved; ++ ++ /* Number of images per bank */ ++ uint16_t num_images; ++ ++ /* Size of image_entry(all banks) in bytes */ ++ uint16_t img_entry_size; ++ ++ /* Size of image bank info structure in bytes */ ++ uint16_t bank_info_entry_size; ++ ++ /* Array of fwu_image_entry structs */ ++ struct fwu_image_entry img_entry[NR_OF_IMAGES_IN_FW_BANK]; ++ ++} __packed; ++ + struct fwu_metadata { + + /* Metadata CRC value */ +@@ -72,8 +101,23 @@ struct fwu_metadata { + /* Previous bank index with which device booted successfully */ + uint32_t previous_active_index; + +- /* Image entry information */ +- struct fwu_image_entry img_entry[NR_OF_IMAGES_IN_FW_BANK]; ++ /* Size of the entire metadata in bytes */ ++ uint32_t metadata_size; ++ ++ /* Offset of the image descriptor structure */ ++ uint16_t desc_offset; ++ ++ /* Reserved */ ++ uint16_t reserved1; ++ ++ /* Bank state: It's not used in corstone1000 at the moment.Currently ++ * not used by any sw componenets such as u-boot and TF-A */ ++ uint8_t bank_state[NR_OF_MAX_FW_BANKS]; ++ ++ /* Reserved */ ++ uint32_t reserved2; ++ ++ struct fwu_fw_store_descriptor fw_desc; + + } __packed; + +@@ -284,7 +328,7 @@ static enum fwu_agent_error_t metadata_validate(struct fwu_metadata *p_metadata) + } + + uint32_t calculated_crc32 = crc32((uint8_t *)&(p_metadata->version), +- sizeof(struct fwu_metadata) - sizeof(uint32_t)); ++ sizeof(struct fwu_metadata) - sizeof(p_metadata->crc_32)); + + if (p_metadata->crc_32 != calculated_crc32) { + FWU_LOG_MSG("%s: failed: crc32 calculated: 0x%x, given: 0x%x\n\r", __func__, +@@ -618,25 +662,31 @@ enum fwu_agent_error_t fwu_metadata_provision(void) + + memset(&_metadata, 0, sizeof(struct fwu_metadata)); + +- _metadata.version = 1; ++ _metadata.version = FWU_METADATA_VERSION; + _metadata.active_index = BANK_0; + _metadata.previous_active_index = BANK_1; ++ _metadata.desc_offset= FWU_FW_STORE_DESC_OFFSET; + ++ _metadata.fw_desc.num_banks = NR_OF_FW_BANKS; ++ _metadata.fw_desc.num_images = NR_OF_IMAGES_IN_FW_BANK; ++ _metadata.fw_desc.img_entry_size = sizeof(struct fwu_image_entry) * NR_OF_IMAGES_IN_FW_BANK; ++ _metadata.fw_desc.bank_info_entry_size = sizeof(struct fwu_image_properties) * NR_OF_FW_BANKS; + /* bank 0 is the place where images are located at the + * start of device lifecycle */ + + for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) { + +- _metadata.img_entry[i].img_props[BANK_0].accepted = IMAGE_ACCEPTED; +- _metadata.img_entry[i].img_props[BANK_0].version = image_version; ++ _metadata.fw_desc.img_entry[i].img_props[BANK_0].accepted = IMAGE_ACCEPTED; ++ _metadata.fw_desc.img_entry[i].img_props[BANK_0].version = image_version; + +- _metadata.img_entry[i].img_props[BANK_1].accepted = IMAGE_NOT_ACCEPTED; +- _metadata.img_entry[i].img_props[BANK_1].version = INVALID_VERSION; ++ _metadata.fw_desc.img_entry[i].img_props[BANK_1].accepted = IMAGE_NOT_ACCEPTED; ++ _metadata.fw_desc.img_entry[i].img_props[BANK_1].version = INVALID_VERSION; + } + +- /* Calculate CRC32 for fwu metadata */ ++ /* Calculate CRC32 for fwu metadata. The first filed in the _metadata has to be the crc_32. ++ * This should be omited from the calculation. */ + _metadata.crc_32 = crc32((uint8_t *)&_metadata.version, +- sizeof(struct fwu_metadata) - sizeof(uint32_t)); ++ sizeof(struct fwu_metadata) - sizeof(_metadata.crc_32)); + + ret = metadata_write(&_metadata); + if (ret) { +@@ -696,7 +746,7 @@ static enum fwu_agent_state_t get_fwu_agent_state( + } + + for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) { +- if ((metadata_ptr->img_entry[i].img_props[boot_index].accepted) ++ if ((metadata_ptr->fw_desc.img_entry[i].img_props[boot_index].accepted) + == (IMAGE_NOT_ACCEPTED)) { + return FWU_AGENT_STATE_TRIAL; + } +@@ -771,7 +821,7 @@ static enum fwu_agent_error_t flash_full_capsule( + } + + if (version <= +- (metadata->img_entry[IMAGE_0].img_props[active_index].version)) { ++ (metadata->fw_desc.img_entry[IMAGE_0].img_props[active_index].version)) { + FWU_LOG_MSG("ERROR: %s: version error\n\r",__func__); + return FWU_AGENT_ERROR; + } +@@ -802,14 +852,14 @@ static enum fwu_agent_error_t flash_full_capsule( + + /* Change system state to trial bank state */ + for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) { +- metadata->img_entry[i].img_props[previous_active_index].accepted = ++ metadata->fw_desc.img_entry[i].img_props[previous_active_index].accepted = + IMAGE_NOT_ACCEPTED; +- metadata->img_entry[i].img_props[previous_active_index].version = version; ++ metadata->fw_desc.img_entry[i].img_props[previous_active_index].version = version; + } + metadata->active_index = previous_active_index; + metadata->previous_active_index = active_index; + metadata->crc_32 = crc32((uint8_t *)&metadata->version, +- sizeof(struct fwu_metadata) - sizeof(uint32_t)); ++ sizeof(struct fwu_metadata) - sizeof(metadata->crc_32)); + + ret = metadata_write(metadata); + if (ret) { +@@ -911,7 +961,7 @@ static enum fwu_agent_error_t accept_full_capsule( + FWU_LOG_MSG("%s: enter\n\r", __func__); + + for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) { +- metadata->img_entry[i].img_props[active_index].accepted = ++ metadata->fw_desc.img_entry[i].img_props[active_index].accepted = + IMAGE_ACCEPTED; + } + +@@ -922,7 +972,7 @@ static enum fwu_agent_error_t accept_full_capsule( + return ret; + } + metadata->crc_32 = crc32((uint8_t *)&metadata->version, +- sizeof(struct fwu_metadata) - sizeof(uint32_t)); ++ sizeof(struct fwu_metadata) - sizeof(metadata->crc_32)); + + ret = metadata_write(metadata); + if (ret) { +@@ -1001,7 +1051,7 @@ static enum fwu_agent_error_t fwu_select_previous( + + index = metadata->previous_active_index; + for (int i = 0; i < NR_OF_IMAGES_IN_FW_BANK; i++) { +- if (metadata->img_entry[i].img_props[index].accepted != IMAGE_ACCEPTED) ++ if (metadata->fw_desc.img_entry[i].img_props[index].accepted != IMAGE_ACCEPTED) + { + FWU_ASSERT(0); + } +@@ -1018,7 +1068,7 @@ static enum fwu_agent_error_t fwu_select_previous( + return ret; + } + metadata->crc_32 = crc32((uint8_t *)&metadata->version, +- sizeof(struct fwu_metadata) - sizeof(uint32_t)); ++ sizeof(struct fwu_metadata) - sizeof(metadata->crc_32)); + + ret = metadata_write(metadata); + if (ret) { +@@ -1218,7 +1268,7 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void) + /* firmware update failed, revert back to previous bank */ + + priv_metadata.fmp_last_attempt_version = +- _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version; ++ _metadata.fw_desc.img_entry[IMAGE_0].img_props[_metadata.active_index].version; + + priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_ERROR_UNSUCCESSFUL; + +@@ -1229,9 +1279,9 @@ enum fwu_agent_error_t corstone1000_fwu_host_ack(void) + /* firmware update successful */ + + priv_metadata.fmp_version = +- _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version; ++ _metadata.fw_desc.img_entry[IMAGE_0].img_props[_metadata.active_index].version; + priv_metadata.fmp_last_attempt_version = +- _metadata.img_entry[IMAGE_0].img_props[_metadata.active_index].version; ++ _metadata.fw_desc.img_entry[IMAGE_0].img_props[_metadata.active_index].version; + + priv_metadata.fmp_last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS; + +-- +2.25.1 + diff --git a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc index 4777251d..96f805a4 100644 --- a/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc +++ b/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc @@ -31,6 +31,7 @@ SRC_URI:append:corstone1000 = " \ file://0011-Platform-corstone1000-Increase-buffers-for-EFI-vars.patch \ file://0012-corstone1000-Remove-reset-after-capsule-update.patch \ file://0013-platform-CS1000-Add-multicore-support-for-FVP.patch \ + file://0014-Platform-Corstone1000-switch-to-metadata-v2.patch \ " # TF-M ships patches for external dependencies that needs to be applied From patchwork Fri Jul 5 16:06:22 2024 Content-Type: text/plain; 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Fri, 5 Jul 2024 09:06:41 -0700 (PDT) From: bence.balogh@arm.com To: meta-arm@lists.yoctoproject.org Cc: Bence Balogh Subject: [PATCH 3/3] arm-bsp/u-boot: corstone1000: use mdata v2 Date: Fri, 5 Jul 2024 18:06:22 +0200 Message-Id: <20240705160622.583987-4-bence.balogh@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240705160622.583987-1-bence.balogh@arm.com> References: <20240705160622.583987-1-bence.balogh@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 05 Jul 2024 16:06:48 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/5867 From: Bence Balogh The mdata structure was modified to use the v2 and did the minimal necessarry changes to make it build without errors. This way the U-Boot metadata is aligned with the TF-A and TF-M structs. Signed-off-by: Bence Balogh --- .../u-boot/u-boot-corstone1000.inc | 1 + .../0050-fwu-Use-metadata-v2.patch | 105 ++++++++++++++++++ 2 files changed, 106 insertions(+) create mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0050-fwu-Use-metadata-v2.patch diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc index 7d8155d4..427e346f 100644 --- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc +++ b/meta-arm-bsp/recipes-bsp/u-boot/u-boot-corstone1000.inc @@ -65,6 +65,7 @@ SRC_URI:append = " \ file://0047-corstone1000-dts-add-external-system-node.patch \ file://0048-corstone1000-Enable-UEFI-Secure-boot.patch \ file://0049-corstone1000-Add-secondary-cores-cpu-nodes-for-FVP.patch \ + file://0050-fwu-Use-metadata-v2.patch \ " do_configure:append() { diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0050-fwu-Use-metadata-v2.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0050-fwu-Use-metadata-v2.patch new file mode 100644 index 00000000..4388db44 --- /dev/null +++ b/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0050-fwu-Use-metadata-v2.patch @@ -0,0 +1,105 @@ +From 54b407fc74c9989c72ab7a571395d8793b409514 Mon Sep 17 00:00:00 2001 +From: Bence Balogh +Date: Wed, 3 Jul 2024 16:38:22 +0200 +Subject: [PATCH] fwu: Use metadata v2 + +The mdata structure was modified to use the v2 and did the minimal +necessarry changes to make it build without errors. This way the +U-Boot metadata is aligned with the TF-A and TF-M structs. + +Upstream-Status: Inappropriate +[This is done correctly upstream but using the upstream patches would +require too many backported patches. The merge commit of the upstream +changes is 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf.] +Signed-off-by: Bence Balogh +--- + cmd/fwu_mdata.c | 2 +- + include/fwu_mdata.h | 17 ++++++++++++++++- + lib/fwu_updates/fwu.c | 8 ++++---- + 3 files changed, 21 insertions(+), 6 deletions(-) + +diff --git a/cmd/fwu_mdata.c b/cmd/fwu_mdata.c +index f04af27de6..73374dca8b 100644 +--- a/cmd/fwu_mdata.c ++++ b/cmd/fwu_mdata.c +@@ -27,7 +27,7 @@ static void print_mdata(struct fwu_mdata *mdata) + + printf("\tImage Info\n"); + for (i = 0; i < CONFIG_FWU_NUM_IMAGES_PER_BANK; i++) { +- img_entry = &mdata->img_entry[i]; ++ img_entry = &mdata->fw_desc.img_entry[i]; + printf("\nImage Type Guid: %pUL\n", + &img_entry->image_type_uuid); + printf("Location Guid: %pUL\n", &img_entry->location_uuid); +diff --git a/include/fwu_mdata.h b/include/fwu_mdata.h +index c61221a917..6a0eb7dce9 100644 +--- a/include/fwu_mdata.h ++++ b/include/fwu_mdata.h +@@ -40,6 +40,16 @@ struct fwu_image_entry { + struct fwu_image_bank_info img_bank_info[CONFIG_FWU_NUM_BANKS]; + } __packed; + ++struct fwu_fw_store_desc { ++ uint8_t num_banks; ++ uint8_t reserved; ++ uint16_t num_images; ++ uint16_t img_entry_size; ++ uint16_t bank_info_entry_size; ++ ++ struct fwu_image_entry img_entry[CONFIG_FWU_NUM_IMAGES_PER_BANK]; ++} __packed; ++ + /** + * struct fwu_mdata - FWU metadata structure for multi-bank updates + * @crc32: crc32 value for the FWU metadata +@@ -60,8 +70,13 @@ struct fwu_mdata { + uint32_t version; + uint32_t active_index; + uint32_t previous_active_index; ++ uint32_t metadata_size; ++ uint16_t desc_offset; ++ uint16_t reserved1; ++ uint8_t bank_state[4]; ++ uint32_t reserved2; + +- struct fwu_image_entry img_entry[CONFIG_FWU_NUM_IMAGES_PER_BANK]; ++ struct fwu_fw_store_desc fw_desc; + } __packed; + + #endif /* _FWU_MDATA_H_ */ +diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c +index 5313d07302..488c9cc661 100644 +--- a/lib/fwu_updates/fwu.c ++++ b/lib/fwu_updates/fwu.c +@@ -131,7 +131,7 @@ static int in_trial_state(struct fwu_mdata *mdata) + struct fwu_image_bank_info *img_bank_info; + + active_bank = mdata->active_index; +- img_entry = &mdata->img_entry[0]; ++ img_entry = &mdata->fw_desc.img_entry[0]; + for (i = 0; i < CONFIG_FWU_NUM_IMAGES_PER_BANK; i++) { + img_bank_info = &img_entry[i].img_bank_info[active_bank]; + if (!img_bank_info->accepted) { +@@ -418,8 +418,8 @@ int fwu_get_image_index(u8 *image_index) + */ + for (i = 0; i < CONFIG_FWU_NUM_IMAGES_PER_BANK; i++) { + if (!guidcmp(&image_type_id, +- &mdata.img_entry[i].image_type_uuid)) { +- img_entry = &mdata.img_entry[i]; ++ &mdata.fw_desc.img_entry[i].image_type_uuid)) { ++ img_entry = &mdata.fw_desc.img_entry[i]; + img_bank_info = &img_entry->img_bank_info[update_bank]; + image_guid = &img_bank_info->image_uuid; + ret = fwu_plat_get_alt_num(dev, image_guid, &alt_num); +@@ -512,7 +512,7 @@ static int fwu_clrset_image_accept(efi_guid_t *img_type_id, u32 bank, u8 action) + if (ret) + return ret; + +- img_entry = &mdata.img_entry[0]; ++ img_entry = &mdata.fw_desc.img_entry[0]; + for (i = 0; i < CONFIG_FWU_NUM_IMAGES_PER_BANK; i++) { + if (!guidcmp(&img_entry[i].image_type_uuid, img_type_id)) { + img_bank_info = &img_entry[i].img_bank_info[bank]; +-- +2.25.1 +