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[107.179.213.3]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-530cc781402sm25826061cf.7.2026.09.11.13.13.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 13:13:52 -0700 (PDT) From: Scott Murray To: yocto-patches@lists.yoctoproject.org Subject: [meta-lts-mixins][scarthgap/rust][PATCH 15/37] rust-target-config: set MIPS ABI in the target JSON Date: Fri, 11 Sep 2026 16:13:01 -0400 Message-ID: <8cce072b9d48e5171ac1b954f283dd5dda6f8f44.1789156653.git.scott.murray@konsulko.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: MIME-Version: 1.0 List-Id: X-Webhook-Received: from 45-33-107-173.ip.linodeusercontent.com [45.33.107.173] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 11 Sep 2026 20:14:04 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/yocto-patches/message/4781 From: WXbet rustc 1.96 (rust-lang/rust#153769) started rejecting MIPS target JSON files that do not carry both an "abi" field and a matching "llvm- abiname" field, aborting libstd-rs's do_compile with error: error loading target specification: invalid MIPS ABI name and `cfg(target_abi)` combination: ABI name: cfg(target_abi): rust_gen_target() populates the target JSON from the DATA_LAYOUT / TARGET_ENDIAN / ... varflags plus an arch-specific "abi" branch that today only covers arm/armv7. On mips*/mipsel* neither "abi" nor "llvm-abiname" is written, so rustc's stricter check fails. Cover every MIPS tune shipped in meta/conf/machine/include/mips/ arch-mips.inc's AVAILTUNES: arch=mips / mipsel -> o32 arch=mips64 / mips64el, ABIEXTENSION="" -> n64 arch=mips64 / mips64el, ABIEXTENSION=n32 -> n32 Note that the mips64-o32 / mips64el-o32 tunes (o32 ABI on a 64-bit MIPS CPU) get MIPSPKGSFX_BYTE="" from arch-mips.inc and therefore TUNE_ARCH="mips[el]"; they fall into the 32-bit branch above. Signed-off-by: WXbet <57314510+WXbet@users.noreply.github.com> Signed-off-by: Richard Purdie (adapted from oe-core commit 8042c1652f774434a0652ff28cd074ee7984d2b9) Signed-off-by: Scott Murray --- classes-recipe/rust-target-config.bbclass | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/classes-recipe/rust-target-config.bbclass b/classes-recipe/rust-target-config.bbclass index 33280ed..351c2d5 100644 --- a/classes-recipe/rust-target-config.bbclass +++ b/classes-recipe/rust-target-config.bbclass @@ -421,6 +421,13 @@ def rust_gen_target(d, thing, wd, arch): elif fpu == "hard": tspec['abi'] = "eabihf" tspec['llvm-floatabi'] = "hard" + if arch in ["mips", "mipsel"]: + tspec['abi'] = "o32" + tspec['llvm-abiname'] = "o32" + elif arch in ["mips64", "mips64el"]: + mips_abi = "n32" if abi == "n32" else "n64" + tspec['abi'] = mips_abi + tspec['llvm-abiname'] = mips_abi tspec['default-uwtable'] = True tspec['dynamic-linking'] = True tspec['executables'] = True