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Fri, 04 Oct 2024 23:54:08 -0700 (PDT) Received: from apollo.hsd1.ca.comcast.net ([2601:646:9d80:4380::6d1b]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c138afaa0sm8024325ad.4.2024.10.04.23.54.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2024 23:54:08 -0700 (PDT) From: Khem Raj To: openembedded-devel@lists.openembedded.org Cc: Khem Raj Subject: [meta-oe][PATCH 1/2] highway: Update the risc32 RVV selection patch Date: Fri, 4 Oct 2024 23:54:05 -0700 Message-ID: <20241005065406.3182738-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.46.2 MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Sat, 05 Oct 2024 06:54:16 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-devel/message/112672 Use the v3 of upstream submitted patch Signed-off-by: Khem Raj --- ...ck-for-deducing-32bit-or-64bit-RISCV.patch | 71 +++++++++---------- 1 file changed, 35 insertions(+), 36 deletions(-) diff --git a/meta-oe/recipes-extended/highway/highway/0001-Add-cmake-check-for-deducing-32bit-or-64bit-RISCV.patch b/meta-oe/recipes-extended/highway/highway/0001-Add-cmake-check-for-deducing-32bit-or-64bit-RISCV.patch index bafe218f0d..ecc9c441c5 100644 --- a/meta-oe/recipes-extended/highway/highway/0001-Add-cmake-check-for-deducing-32bit-or-64bit-RISCV.patch +++ b/meta-oe/recipes-extended/highway/highway/0001-Add-cmake-check-for-deducing-32bit-or-64bit-RISCV.patch @@ -1,4 +1,4 @@ -From 5d40c0c49f9acde83ba71b6f59094cdbd12e1b78 Mon Sep 17 00:00:00 2001 +From b06541a75043c9a8213187fca942a0270783bd0e Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Tue, 17 Sep 2024 18:22:36 +0000 Subject: [PATCH] Add cmake check for deducing 32bit or 64bit RISCV @@ -7,52 +7,49 @@ Currently its only compilable for RV64 when RVV is enabled, this will extend it to build for RV32 with RVV as well -Upstream-Status: Pending +Upstream-Status: Submitted [https://github.com/google/highway/pull/2330] Signed-off-by: Khem Raj --- - CMakeLists.txt | 36 ++++++++++++++++++++++++++++++++++-- - 1 file changed, 34 insertions(+), 2 deletions(-) + CMakeLists.txt | 38 +++++++++++++++++++++++++++++++++++--- + 1 file changed, 35 insertions(+), 3 deletions(-) -diff --git a/CMakeLists.txt b/CMakeLists.txt -index ea8b330c..cd824787 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -65,6 +65,34 @@ if (NOT CMAKE_BUILD_TYPE) - set(CMAKE_BUILD_TYPE RelWithDebInfo) +@@ -59,6 +59,33 @@ if(CHECK_PIE_SUPPORTED) + endif() endif() -+include(CheckCSourceCompiles) ++if (CMAKE_CXX_COMPILER_ARCHITECTURE_ID MATCHES "RISCV32|RISCV64|RISCV128" OR CMAKE_SYSTEM_PROCESSOR MATCHES "riscv32|riscv64|riscv128") ++ include(CheckCSourceCompiles) ++ check_c_source_compiles(" ++ #if __riscv_xlen == 64 ++ int main() { return 0; } ++ #else ++ #error Not RISCV-64 ++ #endif ++ " IS_RISCV_XLEN_64) + -+check_c_source_compiles(" -+#if __riscv_xlen == 64 -+int main() { return 0; } -+#else -+#error Not RISCV-64 -+#endif -+" IS_RISCV_XLEN_64) ++ check_c_source_compiles(" ++ #if __riscv_xlen == 32 ++ int main() { return 0; } ++ #else ++ #error Not RISCV-32 ++ #endif ++ " IS_RISCV_XLEN_32) + -+check_c_source_compiles(" -+#if __riscv_xlen == 32 -+int main() { return 0; } -+#else -+#error Not RISCV-32 -+#endif -+" IS_RISCV_XLEN_32) -+ -+if(IS_RISCV_XLEN_32) -+ set(RISCV_XLEN 32) -+elseif(IS_RISCV_XLEN_64) -+ set(RISCV_XLEN 64) -+else() -+ message(WARNING "Unable to determine RISC-V XLEN") ++ if(IS_RISCV_XLEN_32) ++ set(RISCV_XLEN 32) ++ elseif(IS_RISCV_XLEN_64) ++ set(RISCV_XLEN 64) ++ else() ++ message(WARNING "Unable to determine RISC-V XLEN") ++ endif() +endif() + -+message(STATUS "RISC-V XLEN: ${RISCV_XLEN}") -+ - # The following is only required with GCC < 6.1.0 or CLANG < 16.0 - set(HWY_CMAKE_ARM7 OFF CACHE BOOL "Set copts for Armv7 with NEON (requires vfpv4)?") + include(GNUInstallDirs) -@@ -72,7 +100,7 @@ set(HWY_CMAKE_ARM7 OFF CACHE BOOL "Set copts for Armv7 with NEON (requires vfpv4 + if (NOT CMAKE_BUILD_TYPE) +@@ -72,7 +99,7 @@ set(HWY_CMAKE_ARM7 OFF CACHE BOOL "Set c # skipped. For GCC 13.1+, you can also build with -fexcess-precision=standard. set(HWY_CMAKE_SSE2 OFF CACHE BOOL "Set SSE2 as baseline for 32-bit x86?") @@ -61,15 +58,17 @@ index ea8b330c..cd824787 100644 set(HWY_CMAKE_RVV ON CACHE BOOL "Set copts for RISCV with RVV?") # Unconditionally adding -Werror risks breaking the build when new warnings -@@ -378,7 +406,11 @@ else() +@@ -378,7 +405,13 @@ else() # we add the gcv compiler flag, which then requires the CPU (now when using # either compiler) to support V. if(HWY_CMAKE_RVV) - list(APPEND HWY_FLAGS -march=rv64gcv1p0) + if(RISCV_XLEN EQUAL 64) + list(APPEND HWY_FLAGS -march=rv64gcv1p0) ++ add_link_options(-march=rv64gcv1p0) + elseif(RISCV_XLEN EQUAL 32) + list(APPEND HWY_FLAGS -march=rv32gcv1p0) ++ add_link_options(-march=rv32gcv1p0) + endif() if(${CMAKE_CXX_COMPILER_ID} MATCHES "Clang") list(APPEND HWY_FLAGS -menable-experimental-extensions)