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([2602:feb4:3b:2100:c560:31a3:4ee8:6083]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-25a2b0e5965sm5093855ad.143.2025.09.09.12.30.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Sep 2025 12:30:14 -0700 (PDT) From: Steve Sakoman To: openembedded-core@lists.openembedded.org Subject: [OE-core][kirkstone 4/5] llvm: fix typo in CVE-2024-0151.patch Date: Tue, 9 Sep 2025 12:30:02 -0700 Message-ID: <77f29f8fea58de40459186952d25279877ce4994.1757446071.git.steve@sakoman.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 09 Sep 2025 19:30:20 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/223136 From: Gyorgy Sarvari During backporting the patch, accidentally a variable was removed. In case the recipe is compiled for 32-bit Arm target, compilation fails with the following error: 3.0.1-r0/git/llvm/lib/Target/ARM/ARMISelLowering.cpp:4481:13: error: 'RegVT' was not declared in this scope | 4481 | if (RegVT == MVT::f16 || RegVT == MVT::bf16) | | ^~~~~ This patch corrects the patch, and adds back the removed RegVT variable. Signed-off-by: Gyorgy Sarvari Signed-off-by: Steve Sakoman --- meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch b/meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch index cbe6f5bf3f..f5ef7e8d4f 100644 --- a/meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch +++ b/meta/recipes-devtools/llvm/llvm/CVE-2024-0151.patch @@ -32,6 +32,10 @@ Date: Thu Jun 20 10:22:01 2024 +0100 Upstream-Status: Backport [https://github.com/llvm/llvm-project/commit/78ff617d3f573fb3a9b2fef180fa0fd43d5584ea] CVE: CVE-2024-0151 Signed-off-by: Deepesh Varatharajan + +Added back RegVT variable, which was accidentally removed during backporting. + +Signed-off-by: Gyorgy Sarvari --- diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 900113244e41..e12f8c183db2 100644 @@ -98,16 +102,15 @@ index 900113244e41..e12f8c183db2 100644 Function::const_arg_iterator CurOrigArg = MF.getFunction().arg_begin(); unsigned CurArgIdx = 0; -@@ -4432,7 +4450,7 @@ SDValue ARMTargetLowering::LowerFormalArguments( - } +@@ -4433,6 +4451,7 @@ SDValue ARMTargetLowering::LowerFormalArguments( // Arguments stored in registers. if (VA.isRegLoc()) { -- EVT RegVT = VA.getLocVT(); + EVT RegVT = VA.getLocVT(); + SDValue ArgValue; if (VA.needsCustom() && VA.getLocVT() == MVT::v2f64) { // f64 and vector types are split up into multiple registers or -@@ -4496,16 +4514,6 @@ SDValue ARMTargetLowering::LowerFormalArguments( +@@ -4496,16 +4515,6 @@ SDValue ARMTargetLowering::LowerFormalArguments( case CCValAssign::BCvt: ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); break; @@ -124,7 +127,7 @@ index 900113244e41..e12f8c183db2 100644 } // f16 arguments have their size extended to 4 bytes and passed as if they -@@ -4515,6 +4523,15 @@ SDValue ARMTargetLowering::LowerFormalArguments( +@@ -4515,6 +4524,15 @@ SDValue ARMTargetLowering::LowerFormalArguments( (VA.getValVT() == MVT::f16 || VA.getValVT() == MVT::bf16)) ArgValue = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), ArgValue);