diff mbox series

openssl: fix register trampling on aarch64

Message ID 20250206145255.4091151-1-ross.burton@arm.com
State Accepted, archived
Commit 9005321e37030d916f4f26e7201e2f86c85ebdbd
Headers show
Series openssl: fix register trampling on aarch64 | expand

Commit Message

Ross Burton Feb. 6, 2025, 2:52 p.m. UTC 
Backport a patch from upstream to fix register tramping on aarch64.

Signed-off-by: Ross Burton <ross.burton@arm.com>
---
 .../openssl/openssl/aarch64-regs.patch        | 52 +++++++++++++++++++
 .../openssl/openssl_3.4.0.bb                  |  1 +
 2 files changed, 53 insertions(+)
 create mode 100644 meta/recipes-connectivity/openssl/openssl/aarch64-regs.patch
diff mbox series

Patch

diff --git a/meta/recipes-connectivity/openssl/openssl/aarch64-regs.patch b/meta/recipes-connectivity/openssl/openssl/aarch64-regs.patch
new file mode 100644
index 00000000000..f9773a6183d
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl/aarch64-regs.patch
@@ -0,0 +1,52 @@ 
+From 3ad2277e4522d363ae31a1888531915bb68964dc Mon Sep 17 00:00:00 2001
+From: Julian Andres Klode <julian.klode@canonical.com>
+Date: Sat, 18 Jan 2025 21:12:45 +0100
+Subject: [PATCH] Restore correct registers in aarch64 AES-CTR code
+
+Commit 1d1ca79fe35dbe5c05faed5a2ef8c4de9c5adc49 introduced
+save and restore for the registers, saving them as
+
+	stp		d8,d9,[sp, #16]
+	stp		d10,d11,[sp, #32]
+	stp		d12,d13,[sp, #48]
+	stp		d14,d15,[sp, #64]
+
+But the restore code was inadvertently typoed:
+
+	ldp		d8,d9,[sp, #16]
+	ldp		d10,d11,[sp, #32]
+	ldp		d12,d13,[sp, #48]
+	ldp		d15,d16,[sp, #64]
+
+Restoring [sp, #64] into d15,d16 instead of d14,d15.
+
+Fixes: #26466
+
+CLA: trivial
+
+Reviewed-by: Kurt Roeckx <kurt@roeckx.be>
+Reviewed-by: Paul Dale <ppzgs1@gmail.com>
+Reviewed-by: Tomas Mraz <tomas@openssl.org>
+(Merged from https://github.com/openssl/openssl/pull/26469)
+
+(cherry picked from commit 5261f3ca41cda7ad5767e399e9a2dc008bbad5d6)
+
+Upstream-Status: Backport
+Signed-off-by: Ross Burton <ross.burton@arm.com>
+---
+ crypto/aes/asm/aesv8-armx.pl | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/crypto/aes/asm/aesv8-armx.pl b/crypto/aes/asm/aesv8-armx.pl
+index 33a2dd53dae19..dc019b04ccd25 100755
+--- a/crypto/aes/asm/aesv8-armx.pl
++++ b/crypto/aes/asm/aesv8-armx.pl
+@@ -2493,7 +2493,7 @@ ()
+ 	ldp		d8,d9,[sp, #16]
+ 	ldp		d10,d11,[sp, #32]
+ 	ldp		d12,d13,[sp, #48]
+-	ldp		d15,d16,[sp, #64]
++	ldp		d14,d15,[sp, #64]
+ 	ldr		x29,[sp],#80
+ 	ret
+ .size	${prefix}_ctr32_encrypt_blocks_unroll12_eor3,.-${prefix}_ctr32_encrypt_blocks_unroll12_eor3
diff --git a/meta/recipes-connectivity/openssl/openssl_3.4.0.bb b/meta/recipes-connectivity/openssl/openssl_3.4.0.bb
index 9d99c21c208..cc413e39ba5 100644
--- a/meta/recipes-connectivity/openssl/openssl_3.4.0.bb
+++ b/meta/recipes-connectivity/openssl/openssl_3.4.0.bb
@@ -13,6 +13,7 @@  SRC_URI = "http://www.openssl.org/source/openssl-${PV}.tar.gz \
            file://0001-Configure-do-not-tweak-mips-cflags.patch \
            file://0001-Added-handshake-history-reporting-when-test-fails.patch \
            file://0001-Fix-builds-on-riscv64-using-musl.patch \
+           file://aarch64-regs.patch \
            "
 
 SRC_URI:append:class-nativesdk = " \