From patchwork Thu Jul 16 05:23:47 2026 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: auh@yoctoproject.org X-Patchwork-Id: 92623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1D39C43458 for ; Thu, 16 Jul 2026 05:23:53 +0000 (UTC) Received: from a27-33.smtp-out.us-west-2.amazonses.com (a27-33.smtp-out.us-west-2.amazonses.com [54.240.27.33]) by mx.groups.io with SMTP id smtpd.msgproc01-g2.6150.1784179428902084743 for ; Wed, 15 Jul 2026 22:23:49 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@yoctoproject.org header.s=lvjh2tk576v2ro5mi6k4dt3mc6wpqbky header.b=Dc4b5Zz/; dkim=pass header.i=@amazonses.com header.s=hsbnp7p3ensaochzwyq5wwmceodymuwv header.b=EBygprxX; spf=pass (domain: us-west-2.amazonses.com, ip: 54.240.27.33, mailfrom: 0101019f69618982-6c843ca3-755b-4e4f-b6da-a3a94b7ef755-000000@us-west-2.amazonses.com) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=lvjh2tk576v2ro5mi6k4dt3mc6wpqbky; d=yoctoproject.org; t=1784179428; h=Content-Type:MIME-Version:From:To:Subject:Message-Id:Date; bh=E9bqfcIbUWdllkFyaJJgEGpK87aOQ7+hkfJvI2RbpXU=; b=Dc4b5Zz/Cjqid1Id6zkNiNZ22e6CqZw1wK5apkYivpBWBoo98USVw3iw4+m/TRSb +UUB0EtSTdhHrOMjVm6g3UXPNb9AZthGKz7IFssk0n81PwaxNJsI5IyRd9saoDm+Gsu Smpr6NP0/duNHZZgOU84U2aEUq0DPew/4mFN30yI= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/simple; s=hsbnp7p3ensaochzwyq5wwmceodymuwv; d=amazonses.com; t=1784179428; h=Content-Type:MIME-Version:From:To:Subject:Message-Id:Date:Feedback-ID; bh=E9bqfcIbUWdllkFyaJJgEGpK87aOQ7+hkfJvI2RbpXU=; b=EBygprxXXjg4IizEMnsDdNBE2AYOzX+jrZdv6QGfMYEzF9gr7f6nYRHdEj6pLgqc HJH9rAiV0H1WGkc/qikZJlYZ8LgOS3FZSWdOw0tpsQ+oPLBJprFK/exD0TCeTik7/QL kAG1pEzV9ZnXfPCeOFWAG3pluheC75zpD9enY9SQ= MIME-Version: 1.0 From: auh@yoctoproject.org To: openembedded-core@lists.openembedded.org Subject: [AUH] mesa,mesa-tools-native: upgrading to 26.1.5,26.1.5 SUCCEEDED Message-ID: <0101019f69618982-6c843ca3-755b-4e4f-b6da-a3a94b7ef755-000000@us-west-2.amazonses.com> Date: Thu, 16 Jul 2026 05:23:47 +0000 Feedback-ID: ::1.us-west-2.9np3MYPs3fEaOBysGKSlUD4KtcmPijcmS9Az2Hwf7iQ=:AmazonSES X-SES-Outgoing: 2026.07.16-54.240.27.33 List-Id: X-Webhook-Received: from 45-33-107-173.ip.linodeusercontent.com [45.33.107.173] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 16 Jul 2026 05:23:53 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/241049 Hello, this email is a notification from the Auto Upgrade Helper that the automatic attempt to upgrade the recipe(s) *mesa,mesa-tools-native* to *26.1.5,26.1.5* has Succeeded. Next steps: - apply the patch: git am 0001-mesa-mesa-tools-native-upgrade-26.1.4-26.1.5-26.1.4-.patch - check the changes to upstream patches and summarize them in the commit message, - compile an image that contains the package - perform some basic sanity tests - amend the patch and sign it off: git commit -s --reset-author --amend - send it to the appropriate mailing list Alternatively, if you believe the recipe should not be upgraded at this time, you can fill RECIPE_NO_UPDATE_REASON in respective recipe file so that automatic upgrades would no longer be attempted. Please review the attached files for further information and build/update failures. Any problem please file a bug at https://bugzilla.yoctoproject.org/enter_bug.cgi?product=Automated%20Update%20Handler Regards, The Upgrade Helper -- >8 -- From 6e81373815f16652e8c8a7c6ce6c9e721f55e99e Mon Sep 17 00:00:00 2001 From: Upgrade Helper Date: Thu, 16 Jul 2026 05:15:25 +0000 Subject: [PATCH] mesa,mesa-tools-native: upgrade 26.1.4 -> 26.1.5,26.1.4 -> 26.1.5 --- ...-freedreno-don-t-encode-build-path-into-binaries.patch | 4 ++-- .../0001-gallivm-Fix-armhf-build-against-LLVM-22.patch | 4 ++-- ...001-meson-misdetects-64bit-atomics-on-mips-clang.patch | 2 +- ...intel-compiler-jay-fix-GCC-10-case-label-declara.patch | 5 +---- ...intel-compiler-jay-jay_ir.h-do-not-used-typed-en.patch | 5 +---- ...util-u_math.c-do-not-use-arm-fpu-instructions-if.patch | 8 ++++---- meta/recipes-graphics/mesa/mesa.inc | 4 ++-- 7 files changed, 13 insertions(+), 19 deletions(-) diff --git a/meta/recipes-graphics/mesa/files/0001-freedreno-don-t-encode-build-path-into-binaries.patch b/meta/recipes-graphics/mesa/files/0001-freedreno-don-t-encode-build-path-into-binaries.patch index e976b3399f..3e00556b71 100644 --- a/meta/recipes-graphics/mesa/files/0001-freedreno-don-t-encode-build-path-into-binaries.patch +++ b/meta/recipes-graphics/mesa/files/0001-freedreno-don-t-encode-build-path-into-binaries.patch @@ -1,4 +1,4 @@ -From 4ef7487109f9acfa2baf1a2224da31a0ae0c74c6 Mon Sep 17 00:00:00 2001 +From ddb43c52638b96c17392d08508609525b7db9a06 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 10 Dec 2025 02:27:16 +0200 Subject: [PATCH] freedreno: don't encode build path into binaries @@ -25,7 +25,7 @@ Signed-off-by: Quentin Schulz 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/freedreno/meson.build b/src/freedreno/meson.build -index a4bfd33..330b646 100644 +index e8f01b8..8144a75 100644 --- a/src/freedreno/meson.build +++ b/src/freedreno/meson.build @@ -4,9 +4,10 @@ diff --git a/meta/recipes-graphics/mesa/files/0001-gallivm-Fix-armhf-build-against-LLVM-22.patch b/meta/recipes-graphics/mesa/files/0001-gallivm-Fix-armhf-build-against-LLVM-22.patch index 065dd373a7..7e5a827661 100644 --- a/meta/recipes-graphics/mesa/files/0001-gallivm-Fix-armhf-build-against-LLVM-22.patch +++ b/meta/recipes-graphics/mesa/files/0001-gallivm-Fix-armhf-build-against-LLVM-22.patch @@ -1,4 +1,4 @@ -From 2a40c481affef4df729d794daf378ed2e0184895 Mon Sep 17 00:00:00 2001 +From 41306cf1df603613e98baf2cbab2fc27dad95ea7 Mon Sep 17 00:00:00 2001 From: Alessandro Astone Date: Sun, 1 Mar 2026 18:14:09 +0100 Subject: [PATCH] gallivm: Fix armhf build against LLVM 22 @@ -13,7 +13,7 @@ Signed-off-by: Jose Quaresma 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp -index d3ad342..c95d86e 100644 +index ce8ca02..86779f0 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp +++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp @@ -331,7 +331,7 @@ lp_build_fill_mattrs(std::vector &MAttrs) diff --git a/meta/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch b/meta/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch index b039ac213e..82293dbf6e 100644 --- a/meta/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch +++ b/meta/recipes-graphics/mesa/files/0001-meson-misdetects-64bit-atomics-on-mips-clang.patch @@ -1,4 +1,4 @@ -From 8943b38a0c14b220e3e173c038c87ce9a697c173 Mon Sep 17 00:00:00 2001 +From c21d65f05381c7a836d93494acdb7e5ffb28aefe Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Mon, 13 Jan 2020 15:23:47 -0800 Subject: [PATCH] meson misdetects 64bit atomics on mips/clang diff --git a/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-fix-GCC-10-case-label-declara.patch b/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-fix-GCC-10-case-label-declara.patch index b8b8718979..3340b7e103 100644 --- a/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-fix-GCC-10-case-label-declara.patch +++ b/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-fix-GCC-10-case-label-declara.patch @@ -1,4 +1,4 @@ -From 0b4b577b7fc926d374234c80267a4bf9dcccb7ef Mon Sep 17 00:00:00 2001 +From 03df406963de6ebc40809dc22415c1715a08a905 Mon Sep 17 00:00:00 2001 From: Wang Mingyu Date: Tue, 16 Jun 2026 09:12:34 +0000 Subject: [PATCH] src/intel/compiler/jay: fix GCC 10 case label declaration @@ -37,6 +37,3 @@ index 62b9576..a0a9498 100644 case JAY_OPCODE_DESWIZZLE_EVEN: brw_set_default_exec_size(p, BRW_EXECUTE_16); --- -2.43.0 - diff --git a/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-jay_ir.h-do-not-used-typed-en.patch b/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-jay_ir.h-do-not-used-typed-en.patch index 904b20d440..bc8b3e99e9 100644 --- a/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-jay_ir.h-do-not-used-typed-en.patch +++ b/meta/recipes-graphics/mesa/files/0001-src-intel-compiler-jay-jay_ir.h-do-not-used-typed-en.patch @@ -1,4 +1,4 @@ -From 3adae0d97f655c2991d5b428a3bc95a972e6228b Mon Sep 17 00:00:00 2001 +From 7735c1b9b97809ab97c38cd6bed26f3af1c28d5b Mon Sep 17 00:00:00 2001 From: Alexander Kanavin Date: Sun, 14 Jun 2026 17:42:19 +0200 Subject: [PATCH] src/intel/compiler/jay/jay_ir.h: do not used typed enum @@ -34,6 +34,3 @@ index 8307044..abf175a 100644 enum jay_conditional_mod conditional_mod; jay_def cond_flag; /**< conditional flag */ --- -2.47.3 - diff --git a/meta/recipes-graphics/mesa/files/0001-src-util-u_math.c-do-not-use-arm-fpu-instructions-if.patch b/meta/recipes-graphics/mesa/files/0001-src-util-u_math.c-do-not-use-arm-fpu-instructions-if.patch index be79e29e42..2c381828fd 100644 --- a/meta/recipes-graphics/mesa/files/0001-src-util-u_math.c-do-not-use-arm-fpu-instructions-if.patch +++ b/meta/recipes-graphics/mesa/files/0001-src-util-u_math.c-do-not-use-arm-fpu-instructions-if.patch @@ -1,4 +1,4 @@ -From 013717829278f02b0815d80a423e05e4bd567ae3 Mon Sep 17 00:00:00 2001 +From 589921de37e1658b0ca4984ec68d45ecb8c57659 Mon Sep 17 00:00:00 2001 From: Alexander Kanavin Date: Wed, 1 Jul 2026 22:48:15 +0200 Subject: [PATCH] src/util/u_math.c: do not use arm fpu instructions if fpu is @@ -11,10 +11,10 @@ Signed-off-by: Alexander Kanavin 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/util/u_math.c b/src/util/u_math.c -index 337baa9..9ad03bf 100644 +index 722eac7..8bcfefa 100644 --- a/src/util/u_math.c +++ b/src/util/u_math.c -@@ -86,7 +86,7 @@ util_fpstate_get(void) +@@ -90,7 +90,7 @@ util_fpstate_get(void) if (util_get_cpu_caps()->has_neon) { #ifdef HAVE___BUILTIN_ARM_GET_FPSCR fpstate = __builtin_arm_get_fpscr(); @@ -23,7 +23,7 @@ index 337baa9..9ad03bf 100644 __asm__ volatile("vmrs %0, fpscr" : "=r"(fpstate)); #endif } -@@ -151,7 +151,7 @@ util_fpstate_set(unsigned fpstate) +@@ -157,7 +157,7 @@ util_fpstate_set(unsigned fpstate) if (util_get_cpu_caps()->has_neon) { #ifdef HAVE___BUILTIN_ARM_SET_FPSCR __builtin_arm_set_fpscr(fpstate); diff --git a/meta/recipes-graphics/mesa/mesa.inc b/meta/recipes-graphics/mesa/mesa.inc index bb071e2411..15d56c804d 100644 --- a/meta/recipes-graphics/mesa/mesa.inc +++ b/meta/recipes-graphics/mesa/mesa.inc @@ -23,8 +23,8 @@ SRC_URI = "https://archive.mesa3d.org/mesa-${PV}.tar.xz \ file://0001-src-util-u_math.c-do-not-use-arm-fpu-instructions-if.patch \ " -SRC_URI[sha256sum] = "072705caa9adf4740f1489194b13e278ad959166863b5271fe423a86353c9ab6" -PV = "26.1.4" +SRC_URI[sha256sum] = "79e421c7ce18cd9e790b8375920325779f10798630bf30e0b22f1a21c8617122" +PV = "26.1.5" UPSTREAM_CHECK_GITTAGREGEX = "mesa-(?P\d+(\.\d+)+)"