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[93.89.130.18]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4756636cf98sm12680161f8f.22.2026.07.01.04.58.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jul 2026 04:58:33 -0700 (PDT) From: Alex Kiernan Subject: [PATCH 0/3] tune-cortexa32: AArch32 Thumb-2/crypto fixes, plus a QEMU machine Date: Wed, 01 Jul 2026 12:58:10 +0100 Message-Id: <20260701-tune-a32-v1-0-a43f28b1d7a4@gmail.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIANIARWoC/yXMyw5AMBCF4VeRWWvSDnF7FbGgpoxFSYtIGu+uW H7Jf04AT47JQ5MEcHSy59VGqDQBPfd2IsFjNKDEQpZSif2wJPoMRVkZiQrzKtc1xHxzZPj6rtr utz+GhfT+7uG+H+cDZkhsAAAA X-Change-ID: 20260701-tune-a32-78f0212484c9 To: openembedded-core@lists.openembedded.org Cc: Alex Kiernan , Alex Kiernan X-Mailer: b4 0.15.2 List-Id: X-Webhook-Received: from 45-33-107-173.ip.linodeusercontent.com [45.33.107.173] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Wed, 01 Jul 2026 11:58:41 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/239977 Cortex-A32 is an AArch32-only ARMv8-A core - it has no AArch64 mode at all. The current tune-cortexa32.inc lacks the thumb feature, and its AArch32 crypto FPU selection and PACKAGE_EXTRA_ARCHS names are wrong for a Thumb-2 build. Patch 1 fixes the equivalent problem on the Rust side: rust-common's target_is_armv7() doesn't recognise armv8a, so an AArch32 Thumb build is missing both the +v8 and +thumb2 LLVM features, and the "arm-..." RUST_TARGET_SYS triple doesn't parse as ARMv8 for inline-asm purposes either. This has to land before patch 2, because once tune-cortexa32 enables the thumb feature, building rust for it fails without this fix. Patch 2 is the tune-cortexa32.inc fix itself: add arm and thumb to TUNE_FEATURES, fix PACKAGE_EXTRA_ARCHS to use the t2hf naming, and append crypto-neon-fp-armv8 to TUNE_CCARGS_MFPU when both crypto and neon are active, since on AArch32 the ARMv8 crypto extensions live in the FPU rather than -march alone. Without this, GCC rejects the AES intrinsics used by e.g. mbedtls' aesce.c with "target specific option mismatch". Patch 3 adds a qemuarmv8a32 machine so the above is actually exercisable: QEMU has no Cortex-A32 model, so it boots the virt machine with qemu-system-arm -cpu max instead, reusing the qemuarma15 linux-yocto BSP via KMACHINE. I'm really not sure if this is appropriate for OE-Core - it's useful, but I suspect it really wants a proper U-Boot and kernel config. The real breakage I'm attempting to fix is mbedtls, which I need (covered by #2), which then exposes the problems in libstd-rs (covered by #1). #3 is really here so there's a way to show it which isn't the board I'm building for. AI-Generated: Claude Code (Claude Opus 4.8) Signed-off-by: Alex Kiernan Signed-off-by: Alex Kiernan --- Alex Kiernan (3): rust-target-config: armv8a AArch32 Thumb build fixes tune-cortexa32: enable Thumb-2 and fix AArch32 crypto FPU selection qemuarmv8a32: add QEMU machine for AArch32 ARMv8-A meta/classes-recipe/rust-target-config.bbclass | 21 +++++++++++-- .../machine/include/arm/armv8a/tune-cortexa32.inc | 14 +++++++-- meta/conf/machine/qemuarmv8a32.conf | 36 ++++++++++++++++++++++ meta/recipes-kernel/linux/linux-yocto_6.18.bb | 2 +- 4 files changed, 66 insertions(+), 7 deletions(-) --- base-commit: 9780e392300549f69e11e2f3bcb9bff77b21d572 change-id: 20260701-tune-a32-78f0212484c9 Best regards, -- Alex Kiernan