From patchwork Thu May 16 14:05:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emekcan Aras X-Patchwork-Id: 1099 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC651C25B77 for ; Thu, 16 May 2024 14:05:38 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.14816.1715868337045330849 for ; Thu, 16 May 2024 07:05:37 -0700 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: emekcan.aras@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0F564DA7; Thu, 16 May 2024 07:06:01 -0700 (PDT) Received: from e126835.cambridge.arm.com (e126835.cambridge.arm.com [10.1.32.163]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2EDB73F7A6; Thu, 16 May 2024 07:05:36 -0700 (PDT) From: emekcan.aras@arm.com To: meta-arm@lists.yoctoproject.org Cc: Emekcan Aras Subject: [PATCH scarthgap 0/1] arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence Date: Thu, 16 May 2024 15:05:26 +0100 Message-Id: <20240516140527.67665-1-emekcan.aras@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 16 May 2024 14:05:38 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/5719 From: Emekcan Aras Corstone1000 does not properly clean the cache and disable gic interrupts before the reset. This causes a race condition especially in FVP after reset. This adds proper sequence before resetting the platform. Emekcan Aras (1): arm-bsp/trusted-firmware-a: corstone1000: fix reset sequence ...-clean-the-cache-and-disable-interru.patch | 46 +++++++++++++++++++ .../trusted-firmware-a-corstone1000.inc | 1 + 2 files changed, 47 insertions(+) create mode 100644 meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0005-fix-corstone1000-clean-the-cache-and-disable-interru.patch